SM89516B
8-Bit Micro-controller
64KB Flash
& 1KB RAM embedded
The wake-up is initiated by an interrupt event at INT 0 or INT 1 pin, and is followed by an internal clock de-bouncing
procedure. The de-bouncing logic effectively avoids CPU to run at unstable clock oscillation.
Pin Status in IDLE Mode and Power-Down Mode
Mode
Program Memory
Internal
ALE
1
1
0
0
PSEN
Port0
Data
Float
Data
Float
Port1
Data
Data
Data
Data
Port2
Data
Address
Data
Port3
Data
Data
Data
Data
Idle
Idle
1
1
0
0
External
Internal
External
Power-Down
Power-Down
Data
Specifications subject to change without notice contact your sales representatives for the most recent information.
ISSFD-M087 Ver A SM89516B 3/7/2014
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