SM89516B
8-Bit Micro-controller
64KB Flash
& 1KB RAM embedded
12. Pulse Width Modulation (PWM)
There are two PWM channels in SM89516B. The resolution of PWM channel can be 8-bit or 5-bit depending on the
setting on corresponding PBS bit in PWMCn register, where n-0 or 1.
4
System clock
COUNT[7:0]
PWMCLK
PWMPS
(2-bit timer)
PWMTB
(8-bit timer)
CMPOUT
8-bit or 5-bit Logic
Comparator
MUX
PWMOUTn
To P1.2 and P1.3
2
{ PFS1,PFS0 }
PBS
( 1 for 5-bit PWM)
PWMDn[7:5]
PWMDn[4:0]
n=0,1
Figure : PWMn functional block
Mnemonic Description Dir.
Bit 7
Bit 6
Bit 5
PWM
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
RST
P1 Control
Register
P1CON
PWMC0
PWMC1
PWMD0
PWMD1
9BH
D3H
D4H
B3H
B4H
SDAE
SCLE
-
-
-
PWM1E PWM0E
-
-
00H
00H
00H
00H
00H
PWM Control
Register 0
PWM Control
Register 1
PWM Data
Register 0
PWM Data
Register 1
-
-
-
-
PBS
PBS
D0.2
D1.2
PFS1
PFS1
D0.1
D1.1
PFS0
PFS0
D0.0
D1.0
-
-
-
-
-
D0.7
D1.7
D0.6
D1.6
D0.5
D1.5
D0.4
D1.4
D0.3
D1.3
Mnemonic: P1CON
Address: 9Bh
7
6
5
-
4
-
3
2
1
-
0
-
Reset
00h
SDAE
SCLE
PWM1E PWM0E
PWM1E: Set 1 to configure P1[3] as PWM channel 1 output.
PWM0E: Set 1 to configure P1[2] as PWM channel 0 output.
Mnemonic: PWMC[0:1]
Address: D3h and D4h
7
-
6
-
5
-
4
-
3
-
2
PBS
1
0
Reset
00h
PFS1
PFS0
PBS: When set, the PWM is 5 bits resolution.
PFS [1:0]: The PWM clock divider select.
PFS1
PFS0
PWM clock divider select
0
0
1
1
0
1
0
1
2
4
8
16
Specifications subject to change without notice contact your sales representatives for the most recent information.
ISSFD-M087 Ver A SM89516B 3/7/2014
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