欢迎访问ic37.com |
会员登录 免费注册
发布采购

SM894051C40 参数 Datasheet PDF下载

SM894051C40图片预览
型号: SM894051C40
PDF下载: 下载PDF文件 查看货源
内容描述: 8位微控制器,带有4KB的Flash ROM中嵌入 [8-Bits Micro-controller With 4KB Flash ROM embedded]
分类和应用: 微控制器
文件页数/大小: 15 页 / 499 K
品牌: SYNCMOS [ SYNCMOS TECHNOLOGIES,INC ]
 浏览型号SM894051C40的Datasheet PDF文件第7页浏览型号SM894051C40的Datasheet PDF文件第8页浏览型号SM894051C40的Datasheet PDF文件第9页浏览型号SM894051C40的Datasheet PDF文件第10页浏览型号SM894051C40的Datasheet PDF文件第12页浏览型号SM894051C40的Datasheet PDF文件第13页浏览型号SM894051C40的Datasheet PDF文件第14页浏览型号SM894051C40的Datasheet PDF文件第15页  
SyncMOS Technologies International, Inc.  
SM894051  
8-Bits Micro-controller  
With 4KB Flash ROM embedded  
I/O are provided with LED driving capacity  
LEDEN (LEDENP1, 93H)  
Bit7  
LEDEN  
P17  
Bit6  
LEDEN  
P16  
Bit5  
LEDEN  
P15  
Bit4  
LEDEN  
P14  
Bit3  
LEDEN  
P13  
Bit2  
LEDEN  
P12  
Bit1  
LEDEN  
P11  
Bit0  
LEDEN  
P10  
LEDEN (LEDENP3, 95H)  
Bit7  
LEDEN  
P37  
Bit6  
Unused  
Bit5  
LEDEN  
P35  
Bit4  
LEDEN  
P34  
Bit3  
LEDEN  
P33  
Bit2  
LEDEN  
P32  
Bit1  
LEDEN  
P31  
Bit0  
LEDEN  
P30  
When I/O Ports (Port1 & Port3) output low voltage, they are provided with more sink current (IIL about 20mA) to  
drive LED by setting LED enable bit.  
For example, when setting LEDNP1 [0] to high then P1.0 is provided with more sink current (IIL) to drive LED. And  
so on, each I/O can be set to drive LED by setting correspondent register.  
Extension Function Description  
Watch Dog Timer  
The Watch Dog Timer (WDT) is a 16-bits free-running counter that generate reset signal if the counter overflows.  
The WDT is useful for systems that are susceptible to noise, power glitches, or electronics discharge which causing  
software dead loop or runaway. The WDT function can help user software recover from abnormal software condition.  
The WDT is different from Timer0, Timer1 of general 8051. To prevent a WDT reset can be done by software  
periodically clearing the WDT counter. User should check WDR bit of SCONF register whenever unpracticed reset  
happened.  
The purpose of the secure procedure is to prevent the WDTC value from being changed when system runaway.  
There is a 250KHz RC oscillator embedded in chip. Set WDTE = “1” will enable the RC oscillator and the frequency  
is independent to the system frequency.  
To enable the WDT is done by setting 1 to the bit 7 (WDTE) of WDTC. After WDTE set to 1, the 16-bits counter  
starts to count with the RC oscillator. It will generate a reset signal when overflows. The WDTE bit will be cleared to  
0 automatically when SM894051 been reset, either hardware reset or WDT reset.  
To reset the WDT is done by setting 1 to the CLEAR bit of WDTC before the counter overflow. This will clear the  
content of the 16-bits counter and let the counter re-start to count from the beginning.  
Watch Dog Timer Registers  
Watch Dog Key Register  
WDTKEY ($97)  
Bit7  
Bit6  
Bit5  
Bit4  
Bit3  
Bit2  
Bit1  
Bit0  
WDT KEY7 WDT KEY6 WDT KEY5 WDT KEY4 WDT KEY3 WDT KEY2 WDT KEY1 WDT KEY0  
By default, the WDTC is read only. User needs to write values 1EH, 0E1H sequentially to the WDTKEY (97H)  
register to enable the WDTC write attribute, which is  
MOV WDTKEY, # 01EH  
MOV WDTKEY, # 0E1H  
When WDTC is set, user need to write another values E1H, 1EH sequentially to the WDTKEY (97H) register to  
disable the WDTC write attribute, That is  
MOV WDTKEY, # 0E1H  
MOV WDTKEY, # 01EH  
Specifications subject to change without notice contact your sales representatives for the most recent information.  
SM894051 V1.4 09 /2006  
11