SyncMOS Technologies International. Inc.
SM79108
Set ADCE1
= 1 enables the ADC function on pin P3.5/A13/ADC1,
= 0 disables the ADC function on pin P3.5/A13/ADC1,
= 1 enables the ADC function on pin P3.4/A12/ADC0,
= 0 disables the ADC function on pin P3.4/A12/ADC0,
ADCE1
Set ADCE0
ADCE0
User may compare bits ADCE[3:0] of P3CON with bits CH[1:0] of ADSCR. User may consider P3CON as register for dis-
tinguish general purpose I/O function from other specific functions. After bit ADCE[3:0] been set, the corresponding I/O pin
will be assigned as high impedance input pins for signal input. On the other hand, the setting of CH[1:0] will select ADC
channels accordingly.
6.4 ADC Interrupt
The ADC module will generate one interrupt once one analog-to-digital conversion is completed. The ADC interrupt vector
locates at 4BH. There are three SFRs for configuring ADC interrupt: IP1, IE1 and IFR. To use ADC interrupt is the same
as to use other generic 8052 interrupts. That means using EADC of IE1 for enable/disable ADC interrupt, using PADC for
assign ADC interrupt priority. Whenever ADC interrupt occurs, ADCIF will be set to 1. After ADC interrupt subroutine (vec-
tor) been executed, ADCIF will be cleared to 0.
Interrupt Priority I Register (IP1, 0B9H)
bit-7
bit-0
Unused
Unused
Unused
Unused
PADC
R/W
0
Unused
Unused
Unused
Read /Write:
Reset value:
-
-
-
-
-
-
-
*
*
*
*
*
*
*
Interrupt priority bit PADC = 1 assigns high interrupt priority of ADC interrupt
Interrupt priority bit PADC = 0 assigns low interrupt priority of ADC interrupt
Interrupt Enable I Register (IE1, 0A9H)
bit-7
bit-0
Unused
Unused
Unused
Unused
EADC
R/W
0
Unused
Unused
Unused
Read /Write:
Reset value:
-
-
-
-
-
-
-
*
*
*
*
*
*
*
Interrupt enable bit EADC = 1 enables the ADC interrupt
Interrupt priority bit EADC = 0 disables the ADC interrupt
Interrupt Flag Register (IFR, 0AAH)
bit-7
bit-0
Unused
Unused
Unused
Unused
ADCIF
R/W
0
Unused
Unused
Unused
Read /Write:
Reset value:
-
-
-
-
-
-
-
*
*
*
*
*
*
*
Interrupt flag bit ADCIF will be set to 1 when ADC interrupt occurs. Interrupt flag bit ADCIF will be clear to 0 if ADC
Interrupt subroutine executed.
Specifications subject to change without notice,contact your sales representatives for the most recent information.
14/26
Ver 2.1 SM79108 08/2006
SYNCMOS [ SYNCMOS TECHNOLOGIES,INC ]
