SM59R16A5/SM59R09A5/SM59R05A5
8-Bit Micro-controller
64KB/36KB/20KB with ISP Flash
& 2KB RAM embedded
6.2.3. Third phase: reading the result from the MDx registers.
Read out sequence of the first MDx registers is not critical but the last read (from MD5 - division and MD3 - multiplication,
shift and normalizing) determines the end of a whole calculation (end of phase three).
Table 6-3: MDU registers read sequence
Operation
First read
32Bit/16Bit
MD0 Quotient Low
MD1 Quotient
16Bit/16Bit
MD0 Quotient Low
MD1 Quotient High
16Bit x 16Bit
MD0 Product Low
MD1 Product
shift/normalizing
MD0 LSB
MD1
MD2 Quotient
MD2 Product
MD2
MD3 Quotient High
MD4 Remainder L
MD5 Remainder H
MD4 Remainder Low
MD5 Remainder High
Last read
MD3 Product High
MD3 MSB
Here the operation of normalization and shift will be explained more. In normalization, all reading zeroes in registers
MD0 to MD3 are removed by shift left. The whole operation is completed when the MSB (most significant bit) of MD3
register contains a ’1’. After normalizing, bits ARCON.4 (MSB) to ARCON.0 (LSB) contain the number of shift left
operations. As for shift, SLR bit (ARCON.5) has to contain the shift direction, and ARCON.4 to ARCON.0 represent the
shift count (which must not be 0). During shift, zeroes come into the left or right end of the registers MD0 or MD3,
respectively.
6.3. Normalizing
All reading zeroes of integers variables in registers MD0 to MD3 are removed by shift left operations. The whole operation
is completed when the MSB (most significant bit) of MD3 register contains a ’1’. After normalizing, bits ARCON.4 (MSB)
to ARCON.0 (LSB) contain the number of shift left operations, which were done.
6.4. Shifting
SLR bit (ARCON.5) has to contain the shift direction, and ARCON.4 to ARCON.0 the shift count (which must not be 0).
During shift, zeroes come into the left or right end of the registers MD0 or MD3, respectively.
Specifications subject to change without notice contact your sales representatives for the most recent information.
ISSFD-M047
34
Ver.G SM59R16A5 01/2014
SYNCMOS [ SYNCMOS TECHNOLOGIES,INC ]
