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SM59R05A5L25 参数 Datasheet PDF下载

SM59R05A5L25图片预览
型号: SM59R05A5L25
PDF下载: 下载PDF文件 查看货源
内容描述: SM59R16A5 / SM59R09A5 / SM59R05A5\n8位微控制器\n64KB / 36KB / 20KB具有ISP功能的Flash\n和2KB RAM的嵌入式 [SM59R16A5/SM59R09A5/SM59R05A5 8-Bit Micro-controller 64KB/36KB/20KB with ISP Flash & 2KB RAM embedded]
分类和应用: 微控制器
文件页数/大小: 89 页 / 3025 K
品牌: SYNCMOS [ SYNCMOS TECHNOLOGIES,INC ]
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SM59R16A5/SM59R09A5/SM59R05A5  
8-Bit Micro-controller  
64KB/36KB/20KB with ISP Flash  
& 2KB RAM embedded  
7.2.  
Timer/counter control register (TCON)  
Mnemonic: TCON  
Address: 88h  
7
TF1  
6
TR1  
5
TF0  
4
TR0  
3
IE1  
2
IT1  
1
IE0  
0
IT0  
Reset  
00h  
TF1: Timer 1 overflow flag set by hardware when Timer 1 overflows. This flag can  
be cleared by software and is automatically cleared when interrupt is  
processed.  
TR1: Timer 1 Run control bit. If cleared, Timer 1 stops.  
TF0: Timer 0 overflow flag set by hardware when Timer 0 overflows. This flag can  
be cleared by software and is automatically cleared when interrupt is  
processed.  
TR0: Timer 0 Run control bit. If cleared, Timer 0 stops.  
IE1: Interrupt 1 edge flag. Set by hardware, when falling edge on external pin INT1  
is observed. Cleared when interrupt is processed.  
IT1: Interrupt 1 type control bit. Selects falling edge or low level on input pin to  
cause interrupt.  
IE0: Interrupt 0 edge flag. Set by hardware, when falling edge on external pin INT0  
is observed. Cleared when interrupt is processed.  
IT0: Interrupt 0 type control bit. Selects falling edge or low level on input pin to  
cause interrupt.  
Specifications subject to change without notice contact your sales representatives for the most recent information.  
ISSFD-M047 36 Ver.G SM59R16A5 01/2014  
 
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