SM59R16A5/SM59R09A5/SM59R05A5
8-Bit Micro-controller
64KB/36KB/20KB with ISP Flash
& 2KB RAM embedded
010
011
100
101
110
111
2
3
4
5
6
7
ADJUST = 0:
Mnemonic: ADCDH
Address: ADh
7
6
5
4
3
2
1
0
Reset
ADCD[9] ADCD[8] ADCD[7] ADCD[6] ADCD[5] ADCD[4] ADCD[3] ADCD[2]
00H
Mnemonic: ADCDL
Address: AEh
7
-
6
-
5
-
4
-
3
-
2
-
1
0
Reset
00H
ADCD[1] ADCD[0]
ADJUST = 1:
Mnemonic: ADCDH
Address: ADh
7
-
6
-
5
-
4
-
3
-
2
-
1
0
Reset
00H
ADCD[9] ADCD[8]
Mnemonic: ADCDL
Address: AEh
7
6
5
4
3
2
1
0
Reset
00H
ADCD[7] ADCD[6] ADCD[5] ADCD[4] ADCD[3] ADCD[2] ADCD[1] ADCD[0]
ADCD[9:0]: ADC data register.
Mnemonic: ADCCS
Address: AFh
7
-
6
-
5
-
4
3
2
1
0
Reset
00H
ADCCS[4] ADCCS[3] ADCCS[2] ADCCS[1] ADCCS[0]
ADCCS[4:0]: ADC clock select.
*The ADC clock maximum 12.5MHz.
*The ADC Conversion rate maximum 500KHz.
ADCCS[4:0]
00000
00001
00010
00011
00100
00101
00110
00111
01000
01001
01010
01011
01100
01101
01110
01111
ADC Clock(Hz)
Fclk/2
Clocks for ADC Conversion
46
92
Fclk/4
Fclk/6
Fclk/8
138
184
230
276
322
368
414
460
506
552
598
644
690
736
782
828
Fclk/10
Fclk/12
Fclk/14
Fclk/16
Fclk/18
Fclk/20
Fclk/22
Fclk/24
Fclk/26
Fclk/28
Fclk/30
Fclk/32
Fclk/34
Fclk/36
10000
10001
Specifications subject to change without notice contact your sales representatives for the most recent information.
ISSFD-M047 73 Ver.G SM59R16A5 01/2014
SYNCMOS [ SYNCMOS TECHNOLOGIES,INC ]
