SM59A16U1
8-Bit Micro-controller
64KB with ISP Flash
& 6K+256B RAM embedded
1 = (PWM0, PWM1) is independent mode
13.5
13.6
13.7
13.8
Time Base Counter by PWM clock( TBCOUNTERL, TBCOUNTERH )
Mnemonic: TBCOUNTERL
Address: FCh
7
6
5
4
3
2
1
0
Reset
00H
Time Base Counter Low 8 bit [7:0]
Mnemonic: TBCOUNTERH
Address: FDh
7
6
5
4
3
2
1
0
Reset
00H
-
Time Base Counter High 6 bit [5:0]
PWM Period( PERIODL, PERIODH )
Mnemonic: PERIODL
Address: F1h
7
6
5
4
3
2
2
1
1
0
Reset
FFH
PWM Period Low 8 bit [7:0]
Mnemonic: PERIODH
Address: F2h
7
6
5
4
3
0
Reset
3FH
-
PWM Period High 6 bit [5:0]
Special Event Compare( SEVTCMPL, SEVTCMPH )
Mnemonic: SEVTCMPL
Address: F3h
7
6
5
4
3
2
1
1
0
Reset
FFH
Special Event Compare Low 8 bit [7:0]
Mnemonic: SEVTCMPH
Address: F4h
7
6
5
4
3
2
0
Reset
3FH
-
Special Event Compare High 6 bit [5:0]
PWM Output Enable( PWMEN )
Mnemonic: PWMEN
Address: F5h
Reset
7
6
5
4
3
2
1
0
PWM7EN PWM6EN PWM5EN PWM4EN PWM3EN PWM2EN PWM1EN PWM0EN 00H
PWM7EN PWM 7 Enable
PWM7EN = 0 - PWM7 Output Disable
PWM7EN = 1 - PWM7 Output Enable
PWM6EN PWM 6 Enable
PWM6EN = 0 - PWM6 Output Disable
PWM6EN = 1 - PWM6 Output Enable
PWM5EN PWM 5 Enable
PWM5EN = 0 - PWM5 Output Disable
PWM5EN = 1 - PWM5 Output Enable
Specifications subject to change without notice contact your sales representatives for the most recent information.
ISSFD-M071 Ver A SM59A16U1 04/12/2013
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