SM59A16U1
8-Bit Micro-controller
64KB with ISP Flash
& 6K+256B RAM embedded
EXEN2 = 0 – Disable Timer 2 external reload interrupt.
EXEN2 = 1 – Enable Timer 2 external reload interrupt.
IEIIC: IIC interrupt enable.
IEIIC = 0 – Disable IIC interrupt.
IEIIC = 1 – Enable IIC interrupt.
IELVI: LVI interrupt enable.
IELVI = 0 – Disable LVI interrupt.
IELVI = 1 – Enable LVI interrupt.
IEKBI KBI interrupt enable
EKBI = 0 – Disable KBI interrupt.
IEKBI = 1 – Enable KBI interrupt.
IEADC: A/D converter interrupt enable
IEADC = 0 – Disable ADC interrupt.
IEADC = 1 – Enable ADC interrupt.
IESPI: SPI interrupt enable.
IESPI = 0 – Disable SPI interrupt.
IESPI = 1 – Enable SPI interrupt.
11.3
Interrupt Enable 2 Register( IEN2 )
Mnemonic: IEN2
Address: 9Ah
7
-
6
-
5
-
4
-
3
-
2
1
0
-
Reset
00H
ECmpI
EWDT
ECmpI Enable Comparator interrupt(include comparator_0 and comparator_1).
ECmpI = 0 – Disable Comparator interrupt.
ECmpI = 1 – Enable Comparator interrupt.
EWDT: Enable Watch dog interrupt.
EWDT = 0 – Disable Watchdog interrupt.
EWDT = 1 – Enable Watchdog interrupt.
ES1: ES1=0 – Disable Serial channel 1 interrupt.
ES1=1 – Enable Serial channel 1 interrupt.
11.4
Interrupt Request Register( IRCON )
Mnemonic: IRCON
Address: C0h
7
6
5
4
3
2
1
0
PWMI
F
Reset
EXF2
TF2
IICIF
LVIIF
KBIIF ADCIF SPIIF
00H
EXF2: Timer 2 external reload flag. Must be cleared by software.
TF2: Timer 2 overflow flag. Must be cleared by software.
IICIF: IIC interrupt flag.
Specifications subject to change without notice contact your sales representatives for the most recent information.
ISSFD-M071 Ver A SM59A16U1 04/12/2013
- 77 -