SM59A16U1
8-Bit Micro-controller
64KB with ISP Flash
& 6K+256B RAM embedded
SM0,SM1: Serial Port 0 mode selection.
SM0 SM1
Mode
0
0
1
1
0
1
0
1
0
1
2
3
The 4 modes in UART0, Mode 0 ~ 3, are explained later.
SM20: Enables multiprocessor communication feature
REN0: If set, enables serial reception. Cleared by software to disable reception.
th
TB80:
The 9 transmitted data bit in modes 2 and 3. Set or cleared by the CPU
depending on the function it performs such as parity check, multiprocessor
communication etc.
th
RB80:
TI0:
In modes 2 and 3, it is the 9 data bit received. In mode 1, if SM20 is 0, RB80
is the stop bit. In mode 0, this bit is not used. Must be cleared by software.
Transmit interrupt flag, set by hardware after completion of a serial transfer.
Must be cleared by software.
RI0:
Receive interrupt flag, set by hardware after completion of a serial reception.
Must be cleared by software.
9.2
Serial Port 0 Reload Register( S0RELL, S0RELH )
Mnemonic: S0RELL
Address: AAh
7
6
5
4
3
2
2
1
1
0
Reset
00h
S0REL[7:0]
Mnemonic: S0RELH
Address: BAh
7
6
5
4
3
0
Reset
00h
-
S0REL[9:8]
9.3
9.4
Serial Port 0 Data Buffer( S0BUF )
Mnemonic: S0BUF
Address: 99h
7
6
5
4
3
2
1
0
Reset
00h
S0BUF[7:0]
Serial Port 1 Control Register( S1CON )
Mnemonic: S1CON
Address: 9Bh
7
SM
6
-
5
4
3
2
1
TI1
0
RI1
Reset
00h
SM21
REN1
TB81
RB81
SM: Serial Port 1 mode select.
SM
0
1
Mode
A
B
The 2 modes in UART1, Mode A and Mode B, are explained later.
Specifications subject to change without notice contact your sales representatives for the most recent information.
ISSFD-M071 Ver A SM59A16U1 04/12/2013
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