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OB59A16U1U48VP 参数 Datasheet PDF下载

OB59A16U1U48VP图片预览
型号: OB59A16U1U48VP
PDF下载: 下载PDF文件 查看货源
内容描述: SM59A16U1 8位微控制器 64KB具有ISP闪存 & 6K + 256B RAM嵌入式 [SM59A16U1 8-Bit Micro-controller 64KB with ISP Flash & 6K+256B RAM embedded]
分类和应用: 闪存微控制器
文件页数/大小: 146 页 / 4372 K
品牌: SYNCMOS [ SYNCMOS TECHNOLOGIES,INC ]
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SM59A16U1  
8-Bit Micro-controller  
64KB with ISP Flash  
& 6K+256B RAM embedded  
19. USB function  
USB peripheral module supports USB Control In/Out, Interrupt In/Out and Bulk In/Out transfers. I.e., the  
implementation supports 5 endpoint numbers (0, 1, 2, 3, 4) for a total of 5 endpoints. The Serial Interface Engine (SIE)  
handles all the USB 2.0 protocol and provides a simple Read/Write protocol for the MCU.  
The MCU is a USB function device, and as a result is always a slave to the USB host. The USB host initiates all USB  
data transfers to and from the MCU USB port. There are 5 USB endpoints associated with MCU:  
Endpoint 0: This control endpoint is used to initialize the device, and provides access to USB configuration, control and  
status registers. This endpoint is an 8 bytes bi-direction FIFO.  
Endpoint 1: This endpoint supports interrupt transfers from the MCU transmit mailboxes to the USB host.  
Endpoint 1 is 8 bytes interrupt endpoint.  
Endpoint 2: This endpoint supports interrupt transfers from the USB host to the MCU device.  
Endpoint 2 is 8 bytes interrupt endpoint.  
Endpoint 3: This endpoint supports bulk data transfers from the MCU transmit FIFO to the USB host.  
Endpoint 3 is 64 bytes transmitted FIFO.  
Endpoint 4: This endpoint supports bulk data transfers from the USB host to the MCU receive FIFO.  
Endpoint 4 is 64 bytes received FIFO.  
19.1  
USB Device Enumeration Transfer  
The endpoint 0 is playing an important role in enumeration step. The Serial Interface Engine is designed for handling  
the entire most USB standard commands exclude Class/Vendor, GetDescriptor, SetDescriptor, and SynchFrame  
command. If MCU is received these 4 types command, the SIE will pass the command to endpoint 0, the USB interrupt  
flag register 1 (UIFR1) bit 0 will be set to notify MCU to read endpoint zero command. MCU program should have the  
ability to decode these commands and respond with relationship descriptors (MCU write device descriptor to endpoint  
0). After completed these steps, MCU should be set Endpoint Data Ready Control Register (EPDRDY) bit 1. The SIE  
will fetch these descriptors data and transfer to host by USB cable. Two index pointers are used to access the endpoint  
0. It must be initialized by the MCU, and is automatically incremented after the MCU (or host) reads (read pointer) or  
writes (write pointer) the endpoint 0 data register.  
19.2  
USB Interrupt In Transfer  
Endpoint 1 is used for interrupt transfers to the USB host from a set of 8 bytes FIFO registers that are written by the  
MCU. To transfer a 8 bytes packet, the MCU writes data into the 8 bytes registers and set the transmit flag bit  
(EPDRDY bit 2, endpoint 1 transmitted data ready). The SIE will fetch endpoint 1 data and transfer data to host. If the  
USB host tries to read endpoint 1 when the endpoint 1 transmitted data ready bit is not set, a NAK acknowledge is  
returned. After the USB interrupt transfer completed, the UIFR1 bit 1 will be set to notify MCU that endpoint 1 registers  
have been read by the USB host. This guarantees that a previous interrupt transfer has completed before the endpoint  
1 data are changed.  
19.3  
USB Interrupt Out Transfer  
Endpoint 2 is used for interrupt transfers from the USB host to a set of 8 bytes receive registers which are read by the  
MCU. To transfer a 8bytes packet, the host first performs a USB 8-byte interrupt transfer to the endpoint 2 receive  
Specifications subject to change without notice contact your sales representatives for the most recent information.  
ISSFD-M071  
Ver A SM59A16U1 04/12/2013  
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