SM5964B
8-Bit Micro-controller
64KB with ISP Flash
& 1KB RAM embedded
A[9:0]
DPTR
Bank 12-15 (64B x 4)
Bank 8-11 (64B x 4)
Bank 4-7 (64B x 4)
{RAMS1,RAMS0,@Ri}
MUX
{DBANK[3:0],direct
address}
768
Bytes
On-chip 768B expanded RAM
1KB memory Space
READ
WRITE
Bank 0-3 (64B x 4)
Scratchpad RAM
OME
MOVX @Ri instrcution
SEL
MOVX @DPTR instrcution
Control Logic
DPTR
Chip selection of on-chip expanded RAM and Scratchpad RAM
{RAMS1,RAMS0}
DBANK[7]
Fig.3-4: Access on-chip expanded RAM and scratchpad RAM with both in single 1KB addressing space scheme
Mnemonic: DBANK Address: 86h
7
6
5
4
3
2
1
0
Reset
BSE
-
-
-
BS3
BS2
BS1
BS0
01H
BSE: Set 1 to enable data banking function.
BS[3:0]: One is selected from 16 pieces of 64B data memory bank.
BSE
BS3
BS2
BS1
BS0
Mapped window : $40 - $7F
Physical address
Logically addressed range in 1K memory space
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
x
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
x
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
x
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
x
$000 – $03F
$040 – $07F
$080 – $0BF
$0C0 – $0FF
$100 – $13F
$140 – $17F
$180 – $1BF
$1C0 – $1FF
$200 – $23F
$240 – $27F
$280 – $2BF
$2C0 – $2FF
$300 – $33F
$340 – $37F
$380 – $3BF
$3C0 – $3FF
Scratchpad RAM
( $00 – $FF )
Expanded RAM
( $000 – $2FF)
Mapping is off
Mapping is off
Table3-2: Bank mapping address
Specifications subject to change without notice contact your sales representatives for the most recent information.
ISSFD-M081 Ver A SM5964B 3/7/2014
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