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59A16U1 参数 Datasheet PDF下载

59A16U1图片预览
型号: 59A16U1
PDF下载: 下载PDF文件 查看货源
内容描述: 带USB功能,内嵌64KB具有ISP功能的闪存和6K + 256B RAM的1T 8051控制器59A16U1 [带USB功能,内嵌 64KB具有 ISP 功能的 Flash和 6K+256B RAM的 1T 8051控制器59A16U1]
分类和应用: 闪存控制器
文件页数/大小: 146 页 / 4146 K
品牌: SYNCMOS [ SYNCMOS TECHNOLOGIES,INC ]
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SM59A16U1  
8-Bit Micro-controller  
64KB with ISP Flash  
& 6K+256B RAM embedded  
PWM4EN PWM 4 Enable  
PWM4EN = 0 - PWM4 Output Disable  
PWM4EN = 1 - PWM4 Output Enable  
PWM3EN PWM 3 Enable  
PWM3EN =0 - PWM3 Output Disable  
PWM3EN =1 - PWM3 Output Enable  
PWM2EN PWM 2 Enable  
PWM2EN =0 - PWM2 Output Disable  
PWM2EN =1 - PWM2 Output Enable  
PWM1EN PWM 1 Enable  
PWM1EN =0 - PWM1 Output Disable  
PWM1EN =1 - PWM1 Output Enable  
PWM0EN PWM 0 Enable  
PWM0EN =0 - PWM0 Output Disable  
PWM0EN =1 - PWM0 Output Enable  
13.9  
PWM Special Event( PWMSEV )  
Mnemonic: PWMSEV  
Address: EDh  
7
6
5
4
3
2
-
1
0
Reset  
00H  
SEVPOST[3:0]  
SEVTDIR  
UDIS  
OSYNC  
SEVPOST Special Event Postscale Set  
SEVPOST [3:0] 0000 = 1:1 Postscale  
SEVPOST [3:0] 0001 = 1:2 Postscale  
:
:
SEVPOST [3:0] 1111 = 1:16 Postscale  
SEVTDIR Special event trigger time base direction  
SEVTDIR = 0 - counting upwards  
SEVTDIR = 1 - counting downwards  
UDIS PWM update disable.( This bit affects PERIOD, DUTY, SEVTCMP;  
OVRIDEDIS, OVRIDEDATA)  
UDIS = 0 - update from duty cycle and period buffer are Enable  
UDIS = 1 - update from duty cycle and period buffer are Disable  
OSYNC PWM output override synchronization  
OSYNC = 0 - Asynchronous  
OSYNC = 1 - synchronous  
Specifications subject to change without notice contact your sales representatives for the most recent information.  
ISSFD-M071 Ver A SM59A16U1 04/12/2013  
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