SM59A16U1
8-Bit Micro-controller
64KB with ISP Flash
& 6K+256B RAM embedded
4. CPU Engine
The SM59A16U1 engine is composed of four components:
(1)
Control unit
(2)
Arithmetic – logic unit
(3)
Memory control unit
(4)
RAM and SFR control unit
The SM59A16U1 engine allows to fetch instruction from program memory and to execute using RAM or SFR. The
following chapter describes the main engine register.
Mnemoni
c
ACC
B
PSW
SP
DPL0
DPH0
DPL1
DPH1
AUX
RCON
CKCON
IFCON
PAGESEL
PWMADD
R
PWMDAT
A
USBADD
R
USBDATA
Description
Accumulator
B Register
Program Status
Word
Stack Pointer
Data Pointer Low
0
Data Pointer High
0
Data Pointer Low
1
Data Pointer High
1
Auxiliary Register
Internal RAM
Control Register
Clock Control
Register
Interface Control
Register
SFR Page Mode
Select Register
PWM Address
Register
PWM Data
Register
USB Address
Register
USB Data
Register
Dir.
E0h
F0h
D0h
81h
82h
83h
84h
85h
91h
86h
8Eh
8Fh
BEh
A2h
A3h
A6h
A7h
Bit 7
ACC.7
B.7
CY
Bit 6
Bit 5
Bit 4
ACC.4
B.4
Bit 3
ACC.3
B.3
Bit 2
ACC.2
B.2
OV
Bit 1
ACC.1
B.1
PSW.
1
Bit 0
ACC.0
B.0
P
RST
00H
00H
00H
07H
00H
00H
00H
00H
8051 Core
ACC.6 ACC.5
B.6
B.5
AC
F0
RS[1:0]
SP[7:0]
DPL0[7:0]
DPH0[7:0]
DPL1[7:0]
DPH1[7:0]
BRGS
-
P4SPI
P4UR
1
P4IIC
P0KBI
-
DPS
00H
00H
RCON[7:0]
CLOC
K_RE
ADY
-
CDPR
ITS[2:0]
F32K
-
PWMADDR[7:0]
PWMDATA[7:0]
USBADDR[7:0]
USBDATA[7:0]
F16K
-
-
CLKOUT[2:0]
EMEN
Page_
num
ISPE
Page_
mode
00H
00H
00H
00H
00H
00H
00H
Specifications subject to change without notice contact your sales representatives for the most recent information.
ISSFD-M071
Ver A
SM59A16U1
04/12/2013
- 32 -
SYNCMOS [ SYNCMOS TECHNOLOGIES,INC ]
