SM59A16U1
8-Bit Micro-controller
64KB with ISP Flash
& 6K+256B RAM embedded
4. CPU Engine
The SM59A16U1 engine is composed of four components:
(1)
(2)
(3)
(4)
Control unit
Arithmetic – logic unit
Memory control unit
RAM and SFR control unit
The SM59A16U1 engine allows to fetch instruction from program memory and to execute using RAM or SFR. The
following chapter describes the main engine register.
Mnemoni
Description
Dir.
Bit 7
Bit 6
8051 Core
ACC.7 ACC.6 ACC.5 ACC.4 ACC.3 ACC.2 ACC.1 ACC.0
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
RST
c
ACC
B
Accumulator
B Register
Program Status
Word
Stack Pointer
Data Pointer Low
E0h
F0h
00H
00H
B.7
B.6
B.5
B.4
B.3
B.2
B.1
PSW.
1
B.0
PSW
SP
D0h
81h
82h
CY
AC
F0
RS[1:0]
OV
P
00H
07H
00H
SP[7:0]
DPL0
DPL0[7:0]
0
Data Pointer High
0
Data Pointer Low
1
Data Pointer High
1
DPH0
DPL1
DPH1
AUX
83h
84h
85h
91h
86h
DPH0[7:0]
DPL1[7:0]
DPH1[7:0]
00H
00H
00H
00H
00H
P4UR
1
Auxiliary Register
BRGS
-
P4SPI
P4IIC P0KBI
-
DPS
Internal RAM
Control Register
RCON
RCON[7:0]
CLOC
K_RE
ADY
Clock Control
Register
CKCON
8Eh
ITS[2:0]
-
CLKOUT[2:0]
00H
Interface Control
Register
SFR Page Mode
Select Register
IFCON
8Fh
BEh
A2h
A3h
A6h
A7h
-
CDPR F32K
F16K
-
EMEN ISPE
Page_ Page_
00H
00H
00H
00H
00H
00H
PAGESEL
-
num
mode
PWMADD PWM Address
Register
PWMDAT PWM Data
Register
USBADD USB Address
PWMADDR[7:0]
PWMDATA[7:0]
USBADDR[7:0]
USBDATA[7:0]
R
A
R
Register
USB Data
Register
USBDATA
Specifications subject to change without notice contact your sales representatives for the most recent information.
ISSFD-M071 Ver A SM59A16U1 04/12/2013
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