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SM59A16U1
8-Bit Micro-controller
64KB with ISP Flash
& 6K+256B RAM embedded
SWRES [7:0]:
Software reset register bit. These 8-bit is self-reset at the end of the reset procedure.
SWRES [7:0] = FFh, software reset.
SWRES [7:0] = 00h ~ FEh, MCU no action.
1.4.5
Example Of Software Reset
MOV TAKEY, #55h
MOV TAKEY, #AAh
MOV TAKEY, #5Ah
; enable SWRES write attribute
MOV SWRES, #FFh ; software reset MCU
1.5
Clocks
SM59A16U1 offers four modes to set the system clock. The system clock can set by writer or ICP.
IRC: Internal RC-Oscillator and clock is 22.1184MHz fixed (Default).
20K: Internal RC-Oscillator and clock is 20K Hz fixed.
Xtal: External crystal, and may be connected on XTAL1/XTAL2.
PLL: According to the external crystal generates a fixed 48MHz frequency.
-
System divide clock can‟t be “DIVIDE 1” in PLL mode; otherwise the PLL (48MHz) will exceed MCU
limitation (25MHz).
-
For example to using PLL for system clock:
Crystal:12MHz
System Clock: PLL (48MHz fixed).
System Divide Clock: Divide 2.
MCU generates clock is 24MHz. (48MHz/2)
Note: Recommended to select 6, 12 or 24MHz crystal when USB is used.
The internal clock sources are from the internal OSC with difference frequency division As shown in Table 1-1，the
clock source can set by writer or ICP.
Table 1-1: Selection of clock source
Clock source
external crystal (use XTAL1 and XTAL2 pins )
external crystal (only use XTAL1, the XTAL2 define as I/O)
22.1184MHz from internal OSC
22.1184MHz/2 from internal OSC
22.1184MHz/4 from internal OSC
22.1184MHz/16 from internal OSC
There may be having a little variance in the frequency from the internal OSC. The max variance as giving in Table 1-2.
Table 1-2: Temperature with variance
Temperature Max Variance
25℃
±2%
Specifications subject to change without notice contact your sales representatives for the most recent information.
ISSFD-M071
Ver A
SM59A16U1
04/12/2013
- 24 -
SYNCMOS [ SYNCMOS TECHNOLOGIES,INC ]
