SPE6V8UD
Ultra Low Capacitance 4 -Line ESD Protection Array
SCHEMATIC & PIN CONFIGURATION
As Figure Shown is an example of how to route the high speed differential traces through the SPE6V8UD.The
solid line represents the PCB trace. The PCB traces are used to connect the pin pairs for each line (pin 1 to pin 10,
pin 2 to pin 9, pin 4 to pin 7, pin 5 to pin 6). For example, line 1 enters at pin 1 and exits at Pin 10 and the PCB
trace connects pin 1 and 10 together. This is true for lines connected at pins2, 4, and 5 also. Ground is connected at
pins3 and 8. One large ground pad should be used in lieu of two separate pads.
Flow through Layout Using SPE6V8UD
APPLICATION INFORMATION (
Design Recommendations for HDMI Protection )
Adding external ESD protection to HDMI ports can be challenging. First, ESD protection devices have an inherent
junction capacitance. However, adding even a small amount of capacitance will cause the impedance of the
differential pair to drop. Second , large packages and land pattern requirements cause discontinuities that adversely
affect signal integrity. The SPE6V8UD and is specifically designed for protection of high-speed interfaces such as
HDMI. They present <0.4pF capacitance between the pairs while being rated to handle +/-8KV ESD contact
discharges (15KVair discharge) as outlined in IEC61000-4-2. Each device is in a leadless DFN package that is less
than 1.1mm wide. They are designed such that the traces flow straight through the device. The narrow package and
flow-through design reduces discontinuities and minimizes impact on signal integrity. This becomes even more
critical as signal speeds increase.
2009/ 06 / 20
Ver.1
Page 4
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