HV2762
Truth Table
D0
D1
...
D15
D16
...
D23
LE CLR SW0
SW1
... SW15 SW16 ... SW23
L
H
-
-
-
-
-
-
-
-
-
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
H
X
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
H
OFF
-
-
-
-
ON
-
-
-
-
L
H
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
OFF
-
-
-
-
-
-
-
ON
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
L
H
-
-
-
OFF
-
-
-
-
-
-
ON
-
-
...
...
...
...
-
-
L
H
-
-
-
-
-
-
-
-
-
-
OFF
-
-
-
-
-
ON
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
L
H
X
X
OFF
ON
-
-
-
-
X
X
X
X
X
X
X
X
X
X
X
HOLD PREVIOUS STATE
ALL SWITCHES OFF
X
Notes:
1. The 24 switches operate independently.
2. Serial data is clocked in on the L to H transition of the CLK.
3. All 24 switches go to a state retaining their latched condition at the rising edge of LE. When LE is low the shift registers data flow through the latch.
4. DOUT is high when data in the register 23 is high.
5. Shift registers clocking has no effect on the switch states if LE is high.
6. The CLR clear input overrides all other inputs.
Logic Timing Waveforms
DN - 1
DN
DN + 1
DATA IN
DIN
50%
50%
50%
50%
tWLE
tSD
LE
CLOCK
50%
50%
tSU
th
tDO
DATA OUT
DOUT
50%
tOFF
tON
OFF
ON
VOUT
(typ)
90%
10%
50%
50%
CLR
tWCL
Supertex inc. ● 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel: 408-222-8888 ● www.supertex.com
6
SUPERTEX [ Supertex, Inc ]
