Truth Table
D0
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
X
X
D1
D2
D3
D4
D5
D6
D7
LE
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
H
X
CL
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
H
SW0 SW1 SW2 SW3 SW4 SW5 SW6 SW7
OFF
ON
OFF
ON
OFF
ON
OFF
ON
OFF
ON
OFF
ON
OFF
ON
OFF
ON
HOLD PREVIOUS STATE
OFF OFF OFF OFF OFF OFF OFF OFF
HV230/232
X
X
X
X
X
X
X
X
X
X
X
X
X
X
Notes:
1. The eight switches operate independently.
2. Serial data is clocked in on the L to H transition CLK.
3. The switches go to a state retaining their present condition at the rising edge of LE. When LE is
low the shift register data flows through the latch.
4. D
OUT
is high when data in shift register 7 is high.
5. Shift register clocking has no effect on the switch states if LE is H.
6. The clear input overrides all other inputs.
3
NR032505
SUPERTEX [ Supertex, Inc ]
