HV2303FG-G 参数 Datasheet PDF下载

HV2303

Truth Table

D0

L

H

L

H

L

H

L

H

L

H

L

H

L

H

L

H

X

X

X

X

X

X

X

X

X

X

X

X

X

X

X

X

D1

D2

D3

D4

D5

D6

D7

LE

L

L

L

L

L

L

L

L

L

L

L

L

L

L

L

L

H

X

CLR SW0 SW1 SW2 SW3 SW4 SW5 SW6 SW7

L

L

L

L

L

L

L

L

L

L

L

L

L

L

L

L

L

H

Hold Previous State

All Switches Off

Off

On

Off

On

Off

On

Off

On

Off

On

Off

On

Off

On

Off

On

Notes:

1. The eight switches operate independently.

2. Serial data is clocked in on the L to H transition of the CLK.

3. The switches go to a state retaining their present condition at the rising edge of LE. When LE is low the shift register data flow through the latch.

4. D

OUT

is high when data in the shift register 7 is high.

5. Shift register clocking has no effect on the switch states if LE is high.

6. The CLR clear input overrides all other inputs.

5