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HV219 参数 Datasheet PDF下载

HV219图片预览
型号: HV219
PDF下载: 下载PDF文件 查看货源
内容描述: 低电荷注入8通道高压模拟开关 [Low Charge Injection 8-Channel High Voltage Analog Switch]
分类和应用: 开关高压
文件页数/大小: 8 页 / 573 K
品牌: SUPERTEX [ Supertex, Inc ]
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HV219
HV219
Initial Release
Low Charge Injection
8-Channel High Voltage Analog Switch
Features
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General Description
The Supertex HV219 is a low switch resistance, low charge
injection 8-channel 200V analog switch integrated circuit (IC)
intended primarily for medical ultrasound imaging. The device can
also be used for NDE, non-destructive evaluation applications. The
HV219 is a lower switch resistance, 11ohms versus 22ohms,
version of the Supertex HV20220 device. The lower switch
resistance will help reduce insertion loss. It has the same pin
configuration as that of the Supertex HV20220PJ and the
HV20220FG.
The device is manufactured using Supertex’s HVCMOS (high
voltage CMOS) technology with high voltage bilateral DMOS
structures for the outputs and low voltage CMOS logic for the input
control. The outputs are configured as eight independent single
pole single throw 11 ohms analog switches. The input logic is an 8-
bit serial to parallel shift register followed by an 8-bit parallel latch.
The switch states are determined by the data in the latch. Logic
high will correspond to a closed switch and logic low as an opened
switch.
The HV219 is designed to operate on various combinations of high
voltage supplies. For example the V
PP
and V
NN
supplies can be:
+40V/-160V, +100V/-100V, or +160V/-40V. This allows the user to
maximize the signal voltage for uni-polar negative, bi-polar, or uni-
polar positive.
HVCMOS technology for high performance
Very low quiescent power dissipation-10µA
Output On-resistance typically 11Ω
Low parasitic capacitance
DC to 10MHz analog signal frequency
-60dB typical off-isolation at 5MHz
CMOS logic circuitry for low power
Excellent noise immunity
Serial shift register logic control with latches
Flexible operating supply voltages
Surface mount packages
Applications
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Medical Ultrasound Imaging
Non-Destructive Evaluation
Block Diagram
D
IN
LATCHES
D
LE
CL
LEVEL
SHIFTERS
OUTPUT
SWITCHES
SW0
D
LE
CL
CLK
D
LE
CL
SW1
SW2
D
LE
CL
8 BIT
SHIFT
REGISTER
D
LE
CL
SW3
SW4
D
LE
CL
SW5
D
OUT
D
LE
CL
SW6
D
LE
CL
SW7
V
DD
GND
LE
CL
V
NN
V
PP
A042705
Rev. 2 110504
1