HV219
Ordering Information
Part Number
HV219FG-G
HV219FG-G M931
HV219PJ-G
HV219PJ-G M904
Package Option
48-Lead LQFP
28-Lead PLCC
Packing
250/Tray
1000/Reel
38/Tube
500/Reel
48-Lead LQFP
(top view)
1 28
4
26
Pin Configuration
1
48
-G denotes a lead (Pb)-free / RoHS compliant package
Absolute Maximum Ratings
Parameter
V
DD
logic power supply voltage
V
PP
- V
NN
supply voltage
V
PP
positive high voltage supply
V
NN
negative high voltage supply
Logic input voltages
Analog signal range
Peak analog signal current/channel
Storage temperature
Power dissipation:
28-Lead PLCC
48-Lead LQFP
Value
-0.5V to +15V
220V
-0.5V to V
NN
+200V
+0.5V to -200V
-0.5V to V
DD
+0.3V
V
NN
to V
PP
3.0A
-65
O
C to +150
O
C
1.2W
1.0W
28-Lead PLCC
(top view)
Product Marking
Top Marking
YY = Year Sealed
WW = Week Sealed
LLLLLLLLL
L = Lot Number
Bottom Marking
C = Country of Origin*
A = Assembler ID*
= “Green” Packaging
CCCCCCCC
YYWW
HV219FG
AAA
*May be part of top marking
Package may or may not include the following marks: Si or
Absolute Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation under these conditions is not implied. Continuous operation of the device
at the absolute rating level may affect device reliability. All voltages are referenced to device
ground.
48-Lead LQFP
Top Marking
HV219PJ
YYWW
Operating Conditions
Sym
V
DD
V
PP
V
NN
V
IH
V
IL
V
SIG
T
A
Parameter
Logic power supply voltage
Positive high voltage supply
Negative high voltage supply
High level input logic voltage
Low-level input logic voltage
Analog signal voltage
peak-to-peak
Operating free air temperature
Value
4.5V to 13.2V
40V to V
NN
+200V
-40V to -160V
V
DD
-1.5V to V
DD
0V to 1.5V
V
NN
+10V to V
PP
-10V
0 C to 70 C
O
O
LLLLLLLLLL
Bottom Marking
CCCCCCCCCCC
AAA
YY = Year Sealed
WW = Week Sealed
L = Lot Number
C = Country of Origin*
A = Assembler ID*
= “Green” Packaging
*May be part of top marking
Package may or may not include the following marks: Si or
28-Lead PLCC
Typical Thermal Resistance
Package
48-Lead LQFP
28-Lead PLCC
θ
ja
52
O
C/W
48
O
C/W
Power Up/Down Sequence
1. Power up/down sequence is arbitrary except GND must be powered up first and powered down last. This applies for
applications powering GND of the IC with different voltages.
2. V
SIG
must always be at or in between V
PP
and V
NN
or floating during power up/down transition.
3. Rise and fall times of the power supplies V
DD
, V
PP
, and V
NN
should not be less than 1.0ms.
Doc.# DSFP-HV219
C070713
2
Supertex inc.
www.supertex.com
SUPERTEX [ Supertex, Inc ]
