HV21716/HV21816
Logic Diagram
LATCHES
D
IN
D
LE
D
LE
D
LE
D
LE
8 BIT
SHIFT
REGISTER
D
LE
D
LE
D
LE
D
LE
LEVEL
SHIFTERS
OUTPUT
SWITCHES
SW0
CLK
SW1
SW2
SW3
SW4
SW5
D
OUT
SW6
SW7
V
NN
V
PP
V
DD
Truth Table
D0
L
H
L
H
L
H
L
H
L
H
L
H
L
H
D1
D2
D3
D4
D5
D6
TE –
SOLE
– OB
LE
D7
LE SW0 SW1 SW2 SW3 SW4 SW5 SW6 SW7
L
L
L
L
L
L
L
L
L
L
L
L
L
L
OFF
ON
OFF
ON
OFF
ON
OFF
ON
OFF
ON
OFF
ON
OFF
ON
OFF
ON
HOLD PREVIOUS STATE
Notes:
1. The eight switches operate
independently.
2. Serial data is clocked in on the L→ H
transition CLK.
3. The switches go to a state retaining
their present condition at the rising
edge of LE. When LE is low the shift
register data flows through the latch.
4. D
OUT
is high when switch 7 is on.
5. Shift register clockng has no effect on
the switch states if LE is H.
L
H
X
X
X
X
X
X
X
X
L
L
H
13-70
SUPERTEX [ Supertex, Inc ]
