HV1816
Truth Table
D
0
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
D
1
D
2
D
3
D
4
D
5
D
6
D
7
LE
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
X
H
CL
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
H
L
OFF
OFF
OFF
OFF
OFF
OFF
OFF
SW0
OFF
ON
OFF
ON
OFF
ON
OFF
ON
OFF
ON
OFF
ON
OFF
ON
OFF
ON
OFF
SW1
SW2
SW3
SW4
SW5
SW6
SW7
HOLD PREVIOUS STATE
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Notes:
1. The eight switches operate independently.
2. Serial data is clocked in on the L
→
H transition CLK.
3. The clear input over rides all other inputs.
4. The switches go to a state retaining their present condition at the rising edge of LE. When LE is low the shift register data flows through the latch.
5. D
OUT
is high when switch 7 is on.
6. Shift register clocking has no effect on the switch states if LE is H.
13
13-21