HV101 Demo Board
HV101 Demo Board Schematic
V
PP
OUT
V
PP
IN
OUT+
V
PP
HV101
V
NN
C
2
not used
GATE
GATE
C
1
not used
R
2
not used
C
3
100µF
V
NN
IN
current
probe
OUT-
R
1
0Ω
Q
1
IRFR120N
DRAIN
A very high dV/dt on the input can overload the HV101’s internal
gate clamp, causing turn-on transients. A capacitor in the C
2
position may be used to clamp the gate, preventing the tran-
sients. A 1nF value is usually adequate. Voltage rating should be
16 volts.
To limit short-at-turn-on current, zero-ohm resistor R
1
may be
replaced with a low value resistor. This resistor causes a voltage
drop that tends to cancel-out the applied gate voltage, thus
limiting drain current.
To reduce peak inrush current, a capacitor from gate to drain (C
1
)
may be employed. A resistor (R
2
) is also needed in this configu-
ration for loop stability. Please refer to the HV101 data sheet for
further information.
Note: When making positive-ground measurements, scope
probe loading on the GATE pin may interfere with normal
operation. To observe gate voltages, use negative-ground mea-
surements.
01/21/02
©2001 Supertex Inc. All rights reserved. Unauthorized use or reproduction prohibited.
2
1235 Bordeaux Drive, Sunnyvale, CA 94089
TEL: (408) 744-0100 • FAX: (408) 222-4895
www.supertex.com
SUPERTEX [ Supertex, Inc ]
