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SMS47GR01 参数 Datasheet PDF下载

SMS47GR01图片预览
型号: SMS47GR01
PDF下载: 下载PDF文件 查看货源
内容描述: 四可编程精密梯级定序和监控器 [Quad Programmable Precision Cascade Sequencer and Supervisory Controller]
分类和应用: 监控
文件页数/大小: 19 页 / 915 K
品牌: SUMMIT [ SUMMIT MICROELECTRONICS, INC. ]
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SMS47
Preliminary Information
PIN DESCRIPTIONS (CONTINUED)
A1,A2 (6, 7)
A1 and A2 are the address inputs. When addressing the
SMS47 configuration registers the address inputs distin-
guish which one of four possible devices sharing the
common bus is being addressed.
SDA (9)
SDA is the serial data input/output pin. It should be tied to
VDD_CAP through a pull-up resistor.
SCL (10)
SCL is the serial clock input. It should be tied to VDD_CAP
through a pull-up resistor.
PUP#1, PUP#2, PUP#3 (4, 5, 13)
These are the power-up permitted (PUP) active low open
drain outputs. The PUP pins are used when the SMS47 is
programmed to provide the cascade sequencing of LDOs
or DC/DC converters (see
Figures 1 and 5 for illustra-
tions of cascading).
Each delay is independently enabled
and programmable for its duration (configuration
register
7).
If all PUP# outputs are enabled the order of events
would be as follows: V
0
above threshold then delay to
PUP#1 turning on; V
1
above threshold then delay to PUP#2
turning on; V
2
above threshold then delay to PUP#3 turning
on. The delays are programmable.
SUMMIT MICROELECTRONICS, Inc.
2087 1.0 04/11/05
7