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SMS47GCR02 参数 Datasheet PDF下载

SMS47GCR02图片预览
型号: SMS47GCR02
PDF下载: 下载PDF文件 查看货源
内容描述: 四可编程精密梯级定序和监控器 [Quad Programmable Precision Cascade Sequencer and Supervisory Controller]
分类和应用: 监控
文件页数/大小: 19 页 / 915 K
品牌: SUMMIT [ SUMMIT MICROELECTRONICS, INC. ]
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SMS47  
PreliminaryInformation  
2
I C PROGRAMMING INFORMATION (CONTINUED)  
START and STOP Conditions  
Whenboththedataandclocklinesarehighthebusissaid  
D7  
D0  
D6  
D5  
D4  
D3  
D2  
D1  
to be not busy. A high-to-low transition on the data line,  
MSB  
LSB  
while the clock is high, is defined as the Start condition.  
A low-to-high transition on the data line, while the clock  
is high, is defined as the Stop condition. See Figure 10.  
Address Bits  
Device Type  
SMS47  
Bus  
MSB R/W  
x
x
x
x
1
0
0
1
Configuration Register  
START  
STOP  
Condition  
Condition  
2047 Table11 1.0  
Table 11. Slave Addresses  
Read/WriteBit  
SCL  
SDA In  
The last bit of the data stream defines the operation to be  
performed. When set to 1 a Read operation is selected;  
when set to 0 a Write operation is selected.  
2047 Fig10  
Figure 10. START and STOP Conditions  
WRITE OPERATIONS  
The SMS47 uses byte Write operations. A byte Write  
operation writes a single byte during the nonvolatile write  
period(tWR).  
Acknowledge (ACK)  
Acknowledge is a software convention used to indicate  
successful data transfers. The transmitting device,  
either the Master or the Slave, will release the bus after  
transmitting eight bits. During the ninth clock cycle the  
receiver will pull the SDA line low to Acknowledge that it  
received the eight bits of data. The Master will leave the  
SDA line high (NACK) when it terminates a read function.  
ByteWrite  
AftertheSlaveaddressissent(toidentifytheSlavedevice  
andselecteitheraReadorWriteoperation),asecondbyte  
is transmitted which contains the low order 8 bit address  
of any one of the 256 words in the array. Upon receipt of  
the word address the SMS47 responds with an Acknowl-  
edge. After receiving the next byte of data it again  
responds with an Acknowledge. The Master then termi-  
natesthetransferbygeneratingaStopcondition,atwhich  
timetheSMS47beginstheinternalWritecycle. Whilethe  
internal Write cycle is in progress the SMS47 inputs are  
disabled and the device will not respond to any requests  
from the Master.  
TheSMS47willrespondwithanAcknowledgeafterrecog-  
nitionofaStartconditionanditsslaveaddressbyte. Ifboth  
the device and a write operation are selected the SMS47  
willrespondwithanAcknowledgeafterthereceiptofeach  
subsequent 8-Bit word. In the READ mode the SMS47  
transmitseightbitsofdata,thenreleasestheSDAline,and  
monitorsthelineforanAcknowledgesignal. IfanAcknowl-  
edgeisdetectedandnoStopconditionisgeneratedbythe  
Master, the SMS47 will continue to transmit data. If a  
NACK is detected the SMS47 will terminate further data  
transmissionsandawaitaStopconditionbeforereturning  
to the standby power mode.  
AcknowledgePolling  
WhentheSMS47isperforminganinternalWriteoperation  
itwillignoreanynewStartconditions. Sincethedevicewill  
only return an acknowledge after it accepts the Start the  
part can be continuously queried until an acknowledge is  
issued,indicatingthattheinternalWritecycleiscomplete.  
Seetheflowchartforthepropersequenceofoperationsfor  
polling.  
Device Addressing  
Following a Start condition the Master must output the  
address of the Slave it is accessing. The most significant  
four bits of the Slave address are the device type  
identifier/address. For the SMS47 the default is 1001BIN  
.
The next two bits are the Bus Address. The next bit (the  
7th) is the MSB of the configuration register address.  
SUMMIT MICROELECTRONICS, Inc.  
2087 1.1 04/11/05  
14  
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