SMS45
Preliminary Information
INTERNAL BLOCK DIAGRAM
VDD_CAP
50kΩ
CONFIGURATION
REGISTER
11
RESET#
MR#
1
V0
16
NV DAC +
REF
–
PROGRAMMABLE
RESET PULSE
GENERATOR
V1
2
NV DAC
REF
+
–
PROGRAMMABLE
POWER
CASCADING
4
PUP#1
5
PUP#2
13
PUP#3
V2
3
NV DAC
REF
+
–
PROGRAMMABLE
WATCHDOG
TIMER
SERIAL
BUS
CONTROL
LOGIC
9
SDA
10
SCL
7
A2
6
A1
V3
14
NV DAC
REF
+
–
50kΩ
15
WLDI
SUPPLY
ARBITRATION
CONFIGURATION
REGISTER
4K-BIT NV
MEMORY
VDD_CAP
V0
V1
V2
V3
12
8
VDD_CAP
GND
CASCADE SEQUENCING
Time based sequencing has the ability to turn supplies on
in a specific order. However, it cannot guarantee that each
supply has reached valid voltage levels before the next
supply is sequenced on. Cascade sequencing guarantees
the supplies are enabled a programmed period of time after
the previous voltage has reached its minimum pro-
grammed valid level. Figure 1 shows that each succeeding
voltage must reach its minimum valid level before the timer
is started to time the interval,
t,
for the next voltage. The
duration of each
t
is programmable for each supply to
supply transition. The next supply is not enabled until the
timer has elapsed. See also Figure 5.
6V
5V
5V Valid
4V
V
3.3V Valid
3.3V
2.5V
2V
2.5V Valid
1.8V
0V
t
t
t
T
2047 Fig01
Figure 1. Cascading Power Supplies
2
2079 1.2 05/24/04
SUMMIT MICROELECTRONICS, Inc.
SUMMIT [ SUMMIT MICROELECTRONICS, INC. ]
