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SMS2916S 参数 Datasheet PDF下载

SMS2916S图片预览
型号: SMS2916S
PDF下载: 下载PDF文件 查看货源
内容描述: 电压监控电路,看门狗定时器 [Voltage Supervisory Circuit With Watchdog Timer]
分类和应用: 监控
文件页数/大小: 14 页 / 157 K
品牌: SUMMIT [ SUMMIT MICROELECTRONICS, INC. ]
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SMS2902/SMS2904/SMS2916  
The next three bits are the high order address bits on the  
2904 and 2916 and are Dont Careon the 2902.  
While the internal write cycle is in progress, the SMS29xx  
inputs are disabled, and the device will not respond to any  
requests from the master. Refer to Figure 7 for the  
address, ACKnowledge and data transfer sequence.  
Read/Write Bit  
The last bit of the data stream defines the operation to be  
performed. When set to 1,a read operation is selected;  
when set to 0,a write operation is selected.  
Page WRITE  
The SMS29xx is capable of a 16-byte page write opera-  
tion. It is initiated in the same manner as the byte-write  
operation, but instead of terminating the write cycle after  
the first data word, the master can transmit up to 15 more  
bytes of data. After the receipt of each byte, the SMS29xx  
will respond with an ACKnowledge.  
WRITE OPERATIONS  
The SMS29xx allows two types of write operations: byte  
write and page write. The byte write operation writes a  
single byte during the nonvolatile write period (tWR). The  
page write operation allows up to 16 bytes in the same  
The SMS29xx automatically increments the address for  
subsequent data words. After the receipt of each word,  
the low order address bits are internally incremented by  
one. The high order five bits of the address byte remain  
constant. Should the master transmit more than 16 bytes,  
prior to generating the STOP condition, the address  
counter will roll over,and the previously written data will  
be overwritten. As with the byte-write operation, all inputs  
are disabled during the internal write cycle. Refer to  
Figure 7 for the address, ACKnowledge and data transfer  
sequence.  
page to be written during tWR  
.
Byte WRITE  
Uponreceiptofboththeslaveaddressandwordaddress,  
the SMS29xx responds with an ACKnowledge for each.  
Afterreceivingthenextbyteofdata,itagainrespondswith  
an ACKnowledge. The master then terminates the trans-  
fer by generating a STOP condition, at which time the  
SMS29xx begins the internal write cycle.  
If single byte-write only,  
Stop bit issued here.  
Acknowledges Transmitted from  
SMS29xx to Master Receiver  
Acknowledges Transmitted from  
SMS29xx to Master Receiver  
A
C
K
A
C
K
A
C
K
A
C
K
A
C
K
SDA  
Bus  
Activity  
A
10  
A
9
R
W
Word Address  
Data Byte n  
Data Byte n+1  
Data Byte n+15  
X
X
A
A
9
A
7
A
6
A
5
A
4
A
3
A
2
A
1
A
0
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
0
1 0 1 0 10  
S
T
O
P
S
T
A
R
T
Device  
Type  
Address  
Read/Write  
0= Write  
Slave Address  
Master Sends Read  
Request to Slave  
Master Writes Word  
Address to Slave  
Master Writes  
Data to Slave  
Master Writes  
Data to Slave  
Master Writes  
Data to Slave  
Master Transmitter  
to  
Master Transmitter  
to  
Master Transmitter  
to  
Master Transmitter  
to  
Master Transmitter  
to  
Slave Receiver  
Slave Receiver  
Slave Receiver  
Slave Receiver  
Slave Receiver  
Slave Transmitter  
to  
Slave Transmitter  
to  
Slave Transmitter  
to  
Slave Transmitter  
to  
Slave Transmitter  
to  
Master Receiver  
Master Receiver  
Master Receiver  
Master Receiver  
Master Receiver  
2028 ILL9.1  
Shading Denotes  
SMS29xx  
SDA Output Active  
FIGURE 7. PAGE/BYTE WRITE MODE  
2028 5.1 8/2/00  
8