SMP9517
PIN NAMES
Symbol
UP#
DWN#
V
H
GND
V
OUT
V
L
STR#
V
DD
Description
PB input, moves V
OUT
toward V
H
input
PB input, moves V
OUT
toward V
L
input
V
REF
high
Ground
Trimmed voltage output
V
REF
low
Store input, providing a control input
to initiate a store operation
Supply voltage (2.7V to 5.5V)
2035 Table01 3.0
2035 T PCon 3.0
PINOUT
8-Pin SOIC
UP#
DWN#
VH
GND
1
2
3
4
8
7
6
5
VDD
STR#
VL
VOUT
Analog Section
The SMP9517 is an 7-bit, voltage output digital-to-analog
converter (DAC). The DAC consists of a resistor network
that converts 7-bit digital values into equivalent analog
output voltages in proportion to the applied reference
voltage.
Reference Inputs
The voltage differential between the V
L
and V
H
inputs sets
the full-scale output voltage range. V
L
must be equal to or
greater than ground (a positive voltage). V
H
must be
greater than V
L
and less than or equal to V
DD
. See
specifications for guaranteed operating limits.
Output Buffer Amplifier
The voltage output is from a precision unity-gain follower
that provides a rail-to-rail output swing.
Digital Interface
The interface provides simple pushbutton control of an
up/down counter that drives the DAC. The DAC output is
a ratiometric voltage output.
UP#
is an active low pushbutton input. An internal pull-up
resistor, with nominal value of 50kΩ, eliminates an exter-
nal resistor. A 30ms debounce period is included in the
input timing to prevent multiple pulsing of the counter.
Either a switch closure to ground or a low logic level will,
after the debounce time, change the potentiometer tap
position. UP# moves the output voltage towards the V
H
reference input.
If the UP# pushbutton is kept depressed the counter will
continue to increment at the rate of one count every
250ms for one second. After one second the counter
increments faster, one count every 50ms, until the
pushbutton is released. Changes to the DAC output using
the UP# input do not alter the data stored in EEPROM.
DWN#
is an active low pushbutton input that decrements
the counter and moves the potentiometer output voltage
towards the V
L
reference input. The DWN# control input
also includes an internal 50kΩ pull-up resistor and a 30ms
debounce period to prevent multiple pulsing. A low logic
level will also change the potentiometer tap position after
the debounce period.
If the DWN# pushbutton is kept depressed the counter
continues to decrement at the rate of one count every
250ms for one second. After one second the counter
decrements at one count every 50ms until the pushbutton
is released. Changes to the DAC output using the DWN#
input do not alter the data stored in EEPROM.
STR#
This input can be used in two ways:
1) If the input is tied low, then AUTOSTORE is enabled.
When V
DD
powers down, an automatic store cycle
takes place that updates the nonvolatile EEPROM
memory.
2) STR# is an active low pushbutton input that also
updates the nonvolatile memory. The input is
debounced but does not have an internal pull-up
resistor. For every valid push the SMP9517 will store
the current potentiometer position to EEPROM.
2
2035 3.0 5/10/00
SUMMIT MICROELECTRONICS, Inc.
SUMMIT [ SUMMIT MICROELECTRONICS, INC. ]
