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SMP9317S 参数 Datasheet PDF下载

SMP9317S图片预览
型号: SMP9317S
PDF下载: 下载PDF文件 查看货源
内容描述: 非易失性DACPOT⑩电子电位器,加/减计数器接口 [Nonvolatile DACPOT™ Electronic Potentiometer With Up/Down Counter Interface]
分类和应用: 转换器电位器计数器光电二极管电子
文件页数/大小: 6 页 / 40 K
品牌: SUMMIT [ SUMMIT MICROELECTRONICS, INC. ]
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SMP9317
PIN NAMES
Symbol
INC
UP/DN
V
H
GND
V
OUT
V
L
CS
V
DD
Description
Increment Input, High to Low
Edge Trigger
Up/Down Input controlling relative
V
OUT
movement
V+ reference input
Analog and Digital Ground
Trimmed Voltage Output
V- reference input
Active low chip select input
Supply Voltage (2.7V to 5.5V)
Increment (INC
is an edge triggered input. Whenever
INC)
INC
CS
is low and a high to low transition occurs on the
INC
input, the V
OUT
voltage will either move toward V
H
or V
L
depending upon the state of the UP/DN input.
UP/Down (UP/DN
is an input that will determine the V
OUT
DN)
DN
movement relative to V
H
and V
L
. When
CS
is low, UP/DN
is high and there is a high to low transition on
INC,
the
V
OUT
voltage will move (1/128
th
x V
H
-V
L
) toward V
H
.
When
CS
and UP/DN are low, and there is a high to low
transition on
INC,
the V
OUT
will move (1/128
th
x V
H
-V
L
)
toward V
L
.
Power–Up/Power–Down Conditions
On power–up the SMP9317 loads the value of EEPROM
memory into the wiper position register. The value in the
register is changed using the
CS, INC,
and UP/DN pins.
The new data in the register will be lost at power-down
unless
CS
was brought high, with
INC
high, to initiate a
store operation after the last increment or decrement. On
the next device power–up, the value of EEPROM memory
will be loaded into the wiper position register. During
power-up the SMP9317 is write-protected in two ways:
1) A power-on reset, that trips at approximately 2.5V,
holds
CS
and
INC
high internally.
2) Resistor pull-ups on all logic inputs prevent data
change if the inputs are floating.
Data Retention
The SMP9317 is guaranteed to perform at least
1,000,000 writes to EEPROM before a wear–out condi-
tion can occur. After EEPROM wearout, the SMP9317
continues to function as a volatile digital-potentiometer.
The wiper position can be changed during powered
conditions using the digital interface. However, on power–
up the wiper–position will be indeterminate.
On shipment from the factory, Summit Microelectronics
does not specify any EEPROM memory value. The value
must be set by the customer as needed.
2031 ILL1.0
PINOUT
INC
UP/DN
VH
GND
1
2
3
4
8
7
6
5
VDD
CS
VL
VOUT
Analog Section
The SMP9317 is a 7-bit, voltage output digital-to-analog
converter (DAC). The DAC consists of a resistor network
that converts a 7-bit value into equivalent analog output
voltages in proportion to the applied reference voltage.
Reference Inputs
The voltage differential between the V
L
and V
H
inputs
sets the full-scale output voltage range. V
L
must be equal
to or greater than ground (i.e. a positive voltage). V
H
must
be greater than V
L
and less than or equal to V
DD
. See
table on page 3 for guaranteed operating limits.
Output Buffer Amplifier
The voltage output is from a precision unity-gain follower
that can slew up to 1V/µs.
Digital Interface
The interface is designed to emulate a simple up/down
counter, but instead of a parallel count output, a
ratiometric voltage output is provided.
Chip Select (CS
is an active low input. Whenever
CS
is
CS)
CS
high the SMP9317 is in standby mode and consumes the
least power. This mode is equivalent to a potentiometer
that is adjusted to the required setting. When
CS
is low
the SMP9317 will recognize transitions on the
INC
input
and will move the V
OUT
either toward the V
H
reference or
toward the V
L
reference depending upon the state of the
UP/DN input.
The host may exit an adjustment routine in two ways:
deselecting the SMP9317 while
INC
is low will not per-
form a store operation (a subsequent power cycle will
recall the original data); deselecting the SMP9317 while
INC
is high will store the current V
OUT
setting into non-
volatile memory.
2031-04 12/4/98
2