SUMMIT
MICROELECTRONICS, Inc.
PIN DESCRIPTION
GND
is the device ground pin.
V
OUT
is the voltage output of the DACs. It is
buffered by a unity-gain follower that can slew up to
1V/s.
VREFL
is the lower of the voltage reference
inputs. VREFL must be equal to or greater than
ground and less than VREFH.
VREFH
is the higher of the voltage reference
inputs. VREFH must be equal to or less than VCC
and greater than VREFL.
A0, A1
and
A2
are the address inputs to the
SMP9210 serial interface logic. Biasing the address
inputs will determine the device's bus address that is
contained within the serial data stream when
communication over the serial bus.
SCL
is the serial interface clock. It is used to
clock data into and out of the SMP9210. When
writing to the device, data must remain stable while
SCL is HIGH. When reading, data is clocked out of
the SMP9210 on the falling edge of SCL.
SDA
is a bi-directional pin used to transfer data
into and out of the SMP9210.
Pin 8
is a multifunction pin and is in-system
programmable by the customer or it can be
configured by Summit prior to shipment. It can
function as Chip Select input (V
IH
= selected), a
MUTE input (V
IH
= mute) or as a Vref output (1.25V).
Device Operation
The SMP9210 has two, 10-bit, digital to analog
converters that are comprised of a resistor network
that converts 10-bit digital inputs into equivalent
analog output voltages in proportion to the applied
reference voltages. The voltage differential between
the VREFL and VREFH inputs sets the full-scale
output voltage for its respective DAC.
Each DAC has a 10-bit volatile register that
holds the digital value decoded by the DAC into an
analog voltage output. The register can be written
directly via the serial interface, commanded to load
the zero scale value, full scale value or mid-scale
value or recall a preset value stored in a nonvolatile
register.
Each DAC has a 10-bit nonvolatile register that
can hold a 'set-and-forget' value that can be recalled
whenever the device is powered-on.
The SMP9210 also has a nonvolatile
configuration register that is accessible over the 2-
wire bus. The configuration register is used to
SMP9210 SMP9211 SMP9212
select the device type identifier, the function of pin 8
and the DAC power-on state.
Accessing the DACs
The SMP9210 uses the industry standard 2-wire
serial protocol. The bus is designed for two-way,
two-line serial communication between different
integrated circuits. The two lines are the SCL (serial
clock) and SDA (serial data) and both lines must be
tied to the positive supply through a pull-up resistor..
The protocol defines devices as being either masters
or slaves, the SMP9210 will always be a slave in that
it does not initiate any communications or provide a
clock output.
Data transfers are initiated when a master
issues a 'start' condition, which is a high to low
transition on SDA while SCL is high. The start is
immediately followed by an eight bit transmission:
bits 7:1 comprise the device type identifier and bus
device bus address; bit 0 is the read/write bit
indicating the action to follow. If the intended device
receives the byte and recognizes its address it will
return an acknowledge during the 9
th
clock cycle.
Some data transfers will be concluded with a 'stop'
condition, which is a low to high transition on SDA
while SCL is high. Note: a stop condition must be
performed for all nonvolatile write operations.
Addressing Convention
S
T
A
A
0
1
0
1
2
R
T
A
1
A
0
R/
W
A
C
K
The DAC device type identifier default is
0101[b]. In order to accommodate more than eight
devices on a single bus, the device type identifier can
by modified by the end user by writing to the
configuration registers.
The command structure is illustrated in Table 1.
Of special note is the ability to write individually to the
two DACs or write to them in tandem. The first three
commands are three bytes in length and can either
be volatile or nonvolatile.
The 'Zero' commands load all zeroes into the
DAC registers forcing the V
OUT
to VREFL. The 3F
commands load all ones into the DAC registers,
forcing V
OUT
to VREFH. The Recall commands, write
the nonvolatile register value into the DAC registers.
The PD commands connect V
OUT
to GND. These
four commands are all two bytes; the device
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