SMM150
Preliminary Information
APPLICATIONS INFORMATION
DEVICE OPERATION
POWER SUPPLY
The SMM150 can be powered by a 2.7V to 5.5V input
to the VDD pin (Figure 1). Care should be exercised
that noise from the DC/DC converter is filtered from
the SMM150 VDD pin. See figure 6 for suggestions.
VOLTAGE REFERENCE
The SMM150 uses an internal voltage reference,
VREF with a user programmable level of 0.5V or
1.25V. Total accuracy of VREF is ±0.8% over
temperature and supply variations.
For DC/DC
converters that have output voltages below 1.25V, set
the internal VREF to 0.5V.
MODES OF OPERATION
The SMM150 has two basic modes of operation: UV
and OV monitoring mode and supply margining mode.
A detailed description of each mode and feature
follows. A flow diagram is shown in Figure 5.
MARGIN MODE
The SMM150 can control margining of a DC/DC
converter that has a trim pin or any regulator having
access to its feedback node. The TRIM pin on the
SMM150 is connected to the trim input pin on the
power supply converter. A sense line from the
converter’s point-of-load connects to the VM input.
The margin function begins upon an I
2
C command or
assertion of the MUP/MDN pins. The TRIM pin is
driven by a DAC whose input is incremented or
decremented every 200µS based on the digital
DC/DC
Supply
Margin
N/H/L
comparison of the margin target value and the actual
converter output voltage. The voltage on the TRIM
output will continue increasing (decreasing) until the
converter’s output voltage equals the target margin
voltage. This voltage adjustment allows the SMM150
to control the margined output voltage of the power
supply converter to within ±1.0% in an open-loop
manner.
The converter is held at the margin voltage until the
SMM150 receives an I
2
C command or the respective
MUP/MDN pin is de-asserted. When not margining,
the TRIM pin on the SMM150 is in a high impedance
state. The voltage on the TRIM pin is buffered and
applied to the ADC at the beginning of a margin cycle
to ensure the converter is margined from its nominal
setpoint. This allows a smooth transition from the
converter’s nominal voltage to the SMM150 controlling
that margin voltage to the margin target setting. After
margining high, low or nominal, issuing a margin Off
command will cause the trim pin to go high
impedance. The part margin time from Off to High or
Off to Low is specified as a typical according to the
equation:
T
MARG_UPDATE
= (X)(1.8ms) where:
X=step number of possible 256 and 1 step=5mV
The Active Margin Command Delay Time using the
MUP and MDN pins is shown in Figure 4
GND
Turn on Time
T
MARGIN_UPDATE
SMM150
Total Margin Delay Time
MPU/D/EN
t
MARGIN
- Internal
Programmable Active
Margin Delay Time
t
ADC_DAC
ADC/DAC t
ADC_DAC
ADC/DAC
Sample/
Sample/
Conversion time Conversion time
1.8ms
1.8ms
Figure 4 – Margin Delay Time
Summit Microelectronics, Inc
2075 2.6 05/13/05
8
SUMMIT [ SUMMIT MICROELECTRONICS, INC. ]
