SMM105
Preliminary Information
Figure 2 – Example Power Supply Margining using the SMM105. The waveform on the left is margin low to
high from 1.6V to 2.0V and the waveform on the right is margin high to nominal from 2.0V to 1.8V. The ADOC
function guarantees the output level to be within ±0.2% with a ±0.1% external reference. The bottom
waveform is the READY signal indicating margin is complete.
GENERAL DESCRIPTION
nominal output voltage setting depending on the
specified margin range of the DC-DC converter.
When the SMM105 receives the command to margin,
the Active DC Output Control will adjust the supply to
the selected margin voltage. Once the supply has
reached its margined set point, the Ready bit in the
status register will set and the READY pin will go
active. If Active DC Control is disabled, a margined
supply can return to its nominal voltage by writing to
the margin command register.
The SMM105 is capable of controlling and margining
the DC output voltage of LDOs or DC/DC converters
that use a trim/adjust pin and to automatically change
the level using a unique Active DC Output Control
(ADOCTM). The ADOC function is programmable over
a standard 2-wire I2C serial data interface and can be
used to set the nominal DC output voltage as well as
the margin high and low settings. The part actively
controls the programmed set levels to maintain tight
control over load variations and voltage drops at the
point of load. The margin range will vary depending on
the supply manufacturer and model but the normal
range is 10% adjustment around the nominal output
setting. However, the SMM105 has the capability to
margin from VREF_CNTL to VDD.
In order to obtain maximum accuracy, the SMM105
requires an external voltage reference. An external
reference with ±0.1% accuracy will enable an overall
±0.2% accuracy for the device. A configuration option
also exists so that an internal voltage reference can be
used, but with less accuracy. Total accuracy using the
internal reference is ±0.5%. The SMM105 can be
powered from either a 12V or 8V input via an internal
regulator or the VDD input (Figure 3).
The user can set the desired voltage settings
(nominal, margin high and margin low) into the EE
memory array for the device. Then, volatile registers
are used to select one of these settings. The registers
are accessed over the I2C bus.
The SMM105 has two additional input pins and one
additional output pin. The input pins, COMP1 and
COMP2, are high impedance inputs, each connected
In normal operation, Active DC Output Control is set to
adjust the nominal output voltage of the converter.
Typical converters have ±2% accuracy ratings for their
output voltage. Using the Active DC Output Control
feature of the SMM105 can increase the accuracy to
±0.1%. This high accuracy control of the converter
output voltage is extremely important in low voltage
applications where deviations in power supply voltage
can result in lower system performance. Active DC
Output Control can also be used for margining a
supply during system test or may be turned off by de-
selecting the function in the Control Select Register.
The margin high and margin low voltage settings can
range from 0.3V to VDD around the converters’
to
a
comparator and compared against the
VREF_CNTL input or the internal reference (VREF).
Each comparator can be independently programmed
to monitor for UV or OV. When either of the COMP1
or COMP2 inputs are in fault the open-drain FAULT#
output will be pulled low. A configuration option exists
to disable the FAULT# output during margining.
Programming of the SMM105 is performed over the
industry standard I2C 2-wire serial data interface. A
status register is available to read the state of the part
and a Write Protect (WP#) pin is available to prevent
writing to the configuration registers and EE memory.
Summit Microelectronics, Inc
2068 1.8 09/20/05
2
SUMMIT [ SUMMIT MICROELECTRONICS, INC. ]
