SMB206A/7A/8A
Preliminary
ELECTRICAL OPERATING CHARACTERISTICS (CONTINUED)
PVIN = +12V, VDD = +5V, T
A
= T
J
= -40°C to +85°C unless otherwise noted. Typical values are at +25°C, Note 1,2
Symbol
Parameter
Conditions
Programmable 0.8V-1.8V (100mV
steps) and 2.3/2.5/3.0/3.3/5.0V
0.1A to Full DC Load
Programmable +1.14% to 7.95%
relative to coarse output voltage
(3-bits)
V
FB
slew from completion of I
2
C write
(0.8V-1.8V only)
∆V
OUT
/∆V
IN
(10V < V
IN
< 14V)
Programmable 500/1000kHz
CH0 vs. CH1
SMB206A/7A/8A
-15
180
250
10
SMB207A (CH0/CH1)
I
LIM
T
HO
T
SS
T
SEQ
V
PG0,1
T
BPG
T
UVPG
T
RST
V
UV
V
HYST-UV
Switch Peak Current Limit
Startup holdoff time
Softstart/stop slew
Sequence delay
Output PGOOD/RESET threshold
PGOOD/RESET blanking time
Output PGOOD/RESET glitch filter
RESET Output Delay
Output undervoltage threshold (short
circuit)
UV threshold hysteresis
(short circuit)
Input high voltage
Input low
Open drain outputs
I
SINK
= 3mA
0.3
Programmable 0.5/1.0ms (1 bit)
Programmable 1.5-50ms (2 bits)
V
OUT0,1
rising
Relative to nominal coarse setting
After last step of V
FB
during dynamic
output voltage (Note 3)
V
OUT
falling
V
OUT
rising
% of V
OUT
, V
OUT
falling
100
52.5
-20
-20
85
90
192
32
125
62.5
3
200
72.5
SMB208A (CH0/CH1)
SMB206A (CH0/CH1)
1.5/1.5
3/3
4.5/4.5
10
+20
+20
95
2/2
4/4
6/6
400
Min
Typ
Max
Unit
Step-down regulators (CH0,1)
V
OUT
Coarse Output Voltage
-2.5
+2.5
%
DV
OUTF
Fine Output Voltage Offset
Dynamic Output Voltage Slew Rate
(Note 3)
Line regulation
Feedback pin current
PWM Switching frequency
Phase interleave
High side FET switch resistance
Low side FET switch resistance
0
+7.95
%
SRV
OUT
∆V
LINE
I
FB
F
SW
Θ
R
DSH
R
DSL
103
128
1
1
153
3
us/step
mV/V
uA
15
%
deg
mΩ
Ω
A
A
A
ms
%
%
%
us
us
ms
%
%
% of V
OUT
, V
OUT
rising
Logic Inputs/Outputs (EN0/1, SDA/SCL, PGOOD/RESET)
V
IH
V
IL
V
OL
1.4
0.6
V
V
V
Note 1: Parametric tolerances are only guaranteed for factory-programmed settings. Changing configuration settings from that reflected in the
customer specific CSIR code may result in inaccuracies exceeding those specified above.
Note 2: MIN/MAX limits guaranteed by test, characterization or design.
Note 3: “Coarse” volatile output voltage writes above 1.8V setting requires a channel disable/re-enable to take effect.
SUMMIT Microelectronics, Inc.
2147 2.4 2/23/2012
9
SUMMIT [ SUMMIT MICROELECTRONICS, INC. ]
