S9418
CS
CLK
DI
S
T
A
R
T
C1
C0
Hi Z
A1
A0
D7
D6
D5
D4
D3
D2
D1
D0
DO
Pulled Up to V
DD
RDY/BSY
VOUT
2023 ILL5 1.0
FIGURE 2. WRITE SEQUENCE
Rising Edge Sets
NV Write Enable Latch
Rising Edge Starts
NV Write
CS
CLK
DI
S
T
A
R
T
C1
C0
A1
D0
Address and Data
are Don’t Care
S
T
A
R
T
C1
C0
A1
A0
D7
D6
D5
D4
D3
D2
D1
D0
Pulled Up to V
DD
NV Write Enable
Latch is Reset
RDY/BSY
2023 ILL4 1.0
FIGURE 3. NONVOLATILE WRITE SEQUENCE
NONVOLATILE WRITE
A nonvolatile write is a two step operation: it is initiated by
taking
CS
LOW and clocking in a start bit followed by the
NV Write Enable command. At this point the host can take
CS
back high or continue clocking in data. This data is
don’t care and will be ignored by the S9418.
Next, the host takes
CS
LOW again and issues a write
command and address and then clocks in the eight data
bits to be programmed. The host will then bring
CS
HIGH
and the data will be latched into the data register and a
nonvolatile write operation will commence.
The status of the nonvolatile write can be monitored on the
RDY/BSY pin. A logic low indicates the write is still in
progress and the S9418 will not be accessible to the host;
a logic high indicates the write has completed and the
S9418 is ready for the next command. Refer to Figure 3
for an illustration of the sequence of bus conditions for a
nonvolatile write operation.
2023 1.5 4/24/99
4
SUMMIT [ SUMMIT MICROELECTRONICS, INC. ]
