S4242/S42WD42/S4261/S42WD61
WRITE OPERATIONS
Page WRITE
The S42xxx is capable of a 16-byte page write operation.
The S42xxx allows two types of write operations: byte It is initiated in the same manner as the byte-write opera-
write and page write. The byte write operation writes a tion,butinsteadofterminatingthewritecycleafterthefirst
single byte during the nonvolatile write period (tWR). The data word, the master can transmit up to 15 more words
page write operation allows up to 16 bytes in the same of data. After the receipt of each word, the S42xxx will
page to be written during tWR
.
respond with an ACKnowledge.
Byte WRITE
The S42xxx automatically increments the address for
After the slave address is sent (to identify the slave subsequent data words. After the receipt of each word,
device, specify high order word address and a read or the four low order address bits are internally incremented
write operation), a second byte is transmitted which byone. Thehighorderfivebitsoftheaddressbyteremain
contains the low 8 bit addresses of any one of the 2,048 constant. Should the master transmit more than sixteen
words in the array.
words, prior to generating the STOP condition, the ad-
dress counter will “roll over,” and the previously written
data will be overwritten. As with the byte-write operation,
all inputs are disabled during the internal write cycle.
Refer to Figure 10 for the address, ACKnowledge and
data transfer sequence.
Upon receipt of the word address, the S42xxx responds
with an ACKnowledge. After receiving the next byte of
data, it again responds with an ACKnowledge. The mas-
ter then terminates the transfer by generating a STOP
condition, at which time the S42xxx begins the internal
write cycle.
While the internal write cycle is in progress, the S42xxx
inputs are disabled, and the device will not respond to any
requests from the master. Refer to Figure 10 for the
address, ACKnowledge and data transfer sequence.
If single byte-write only,
Stop bit issued here.
Acknowledges Transmitted from
42xxx to Master Receiver
Acknowledges Transmitted from
42xxx to Master Receiver
A
C
K
A
C
K
A
C
K
A
C
K
A
C
K
SDA
Bus
A
10
A
9
A
8
R
W
Word Address
Data Byte n
Data Byte n+1
Data Byte n+15
Activity
A
7
A
6
A
5
A
4
A
3
A
2
A
1
A
0
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
1 0 1 0
0
S
T
O
P
S
T
A
R
T
Device
Type
Address
A10,A9,A8
Read/Write
0= Write
Slave Address
Master Sends Read
Request to Slave
Master Writes Word
Address to Slave
Master Writes
Data to Slave
Master Writes
Data to Slave
Master Writes
Data to Slave
Master Transmitter
to
Master Transmitter
to
Master Transmitter
to
Master Transmitter
to
Master Transmitter
to
Slave Receiver
Slave Receiver
Slave Receiver
Slave Receiver
Slave Receiver
Slave Transmitter
to
Slave Transmitter
to
Slave Transmitter
to
Slave Transmitter
to
Slave Transmitter
to
Master Receiver
Master Receiver
Master Receiver
Master Receiver
Master Receiver
2025 ILL10.1
Shading Denotes
42xxx
SDA Output Active
FIGURE 10. PAGE/BYTE WRITE MODE
2025 6.0 4/17/00
9
SUMMIT [ SUMMIT MICROELECTRONICS, INC. ]
