S4242/S42WD42/S4261/S42WD61
PIN DESCRIPTIONS
ENDURANCE AND DATA RETENTION
Serial Clock (SCL) - The SCL input is used to clock data The S42xxx is designed for applications requiring
100,000 erase/write cycles and unlimited read cycles. It
remainstablewhileSCLisHIGH.IntheREADmode,data provides 100 years of secure data retention, with or
into and out of the device. In the WRITE mode, data must
without power applied, after the execution of 100,000
is clocked out on the falling edge of SCL.
erase/write cycles.
Serial Data (SDA) - The SDA pin is a bidirectional pin
used to transfer data into and out of the device. Data may Reset Controller Description
changeonlywhenSCLisLOW,exceptSTARTandSTOP The S42xxx provides a precision RESET controller that
conditions. It is an open-drain output and may be wire- ensures correct system operation during brown-out and
ORed with any number of open-drain or open-collector power-up/-downconditions. Itisconfiguredwithtwoopen
outputs.
drain RESET outputs; pin 7 is an active high output and
pin 2 is an active low output. For proper operation pin 7
should be tied low through a pull-down resistor while pin
RESET# - RESET# is an active low open-drain output. It
shouldbetiedhighthroughapull-upresistorconnectedto
VCC. RESET# is an I/O, therefore it may also be used to
condition a RESET# signal generated by another device;
it can also be used to debounce a pushbutton input.
2 should be tied high through a resistor connected to VCC
.
During power-up, the RESET outputs remain active until
VCC reaches the VTRIP threshold and will continue driving
the outputs for tPURST (200 msec)after reaching VTRIP
The RESET outputs will be valid so long as VCC is > 1.0V.
During power-down, the RESET outputs will begin driving
.
RESET - RESET is an active high open drain (PFET)
output. It should be tied low through a pull-down resistor
connected to ground. RESET is an I/O, therefore it may
also be used to condition a RESET signal generated by
another device.
active when VCC falls below VTRIP
.
The RESET pins are I/Os; therefore, the S42xxx can act
as a signal conditioning circuit for an externally applied
reset. The inputs are edge triggered; that is, the RESET
input will initiate a reset timeout after detecting a low to
high transition and the RESET# input will initiate a reset
VSENSE - The VSENSE input is used as a second voltage
sensinginput. Thepinistiedtoacomparatorthatusesthe
precision internal 1.25V reference.
VLOW# - VLOW# is an active low open drain output driven
low whenever VSENSE is below 1.25V. It is not a timed
timeoutafterdetectingahightolowtransition.Refertothe
applications information section for more details on de-
vice operation as a reset conditioning circuit.
output and only responds to the state of VSENSE
.
Voltage Sensor Description
VSENSE is an auxiliary voltage detection circuit. Its thresh-
old is set at 1.25V and it generates a VLOW# output for an
under-voltage condition. Because the VLOW# output is
open-drain, it can be wire-ORed with the RESET# output
or tied directly to an IRQ input on a microcontroller.
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SUMMIT [ SUMMIT MICROELECTRONICS, INC. ]
