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S42WD61SAS 参数 Datasheet PDF下载

S42WD61SAS图片预览
型号: S42WD61SAS
PDF下载: 下载PDF文件 查看货源
内容描述: 双电压监控电路,看门狗定时器 [Dual Voltage Supervisory Circuit With Watchdog Timer]
分类和应用: 监控
文件页数/大小: 16 页 / 105 K
品牌: SUMMIT [ SUMMIT MICROELECTRONICS, INC. ]
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S4242/S42WD42/S4261/S42WD61  
Acknowledge Polling  
READ OPERATIONS  
WhentheS42xxxisperforminganinternalWRITEopera-  
tion, it will ignore any new START conditions. Since the Read operations are initiated with the R/W bit of the  
device will only return an acknowledge after it accepts the identification field set to 1.There are four different read  
START, the part can be continuously queried until an options:  
acknowledgeisissued, indicatingthattheinternalWRITE  
1. Current Address Byte Read  
cycle is complete.  
2. Random Address Byte Read  
To poll the device, give it a START condition, followed by  
a slave address for a WRITE operation (See Figure 9).  
3. Current Address Sequential Read  
4. Random Address Sequential Read  
Current Address Byte Read  
Internal WRITE Cycle  
In Progress;  
Begin ACK Polling  
The S42xxx contains an internal address counter which  
maintains the address of the last word accessed,  
incremented by one. If the last address accessed (either  
a read or write) was to address location n, the next read  
operation would access data from address location n+1  
and increment the current address pointer. When the  
S42xxx receives the slave address field with the R/W bit  
set to 1,it issues an acknowledge and transmits the 8-  
bit word stored at address location n+1.  
Issue Start  
Issue Slave  
Address and  
R/W = 0  
Issue Stop  
ACK  
Returned?  
No  
The current address byte read operation only accesses a  
singlebyteofdata. Themasterdoesnotacknowledgethe  
transfer, but does generate a stop condition. At this point,  
the S42xxx discontinues data transmission. See  
Figure 12 for the address acknowledge and data transfer  
sequence.  
Yes (Internal WRITE Cycle is completed)  
Next  
operation a  
WRITE?  
No  
Yes  
Issue Byte  
Address  
Issue Stop  
Await Next  
Command  
Proceed with  
WRITE  
2025 ILL11.0  
FIGURE 11. ACKNOWLEDGE POLLING  
A
C
K
A
10  
A
9
A
8
R
W
Data Byte  
1
SDA Bus Activity  
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
1
1 0 1 0  
1
S
T
A
R
T
S
T
O
P
Device  
Type  
Address  
A10,A9,A8  
Read/Write  
1= Read  
Lack of ACK (low)  
from Master  
determines last  
data byte to be read  
Slave Address  
Slave sends  
Data to Master  
Master sends Read  
request to Slave  
Slave Transmitter  
to  
Shading Denotes  
Master Transmitter  
to  
42xxx  
Master Receiver  
SDA Output Active  
Slave Receiver  
2025 ILL12.1  
FIGURE 12. CURRENT ADDRESS BYTE READ MODE  
2025 6.0 4/17/00  
10