VN5160S-E
Electrical specifications
STATUS (VSD=0V)(1)
Table 12. Truth table
Conditions
INPUT
OUTPUT
L
L
H
H
Normal operation
Current limitation
Overtemperature
Undervoltage
H
H
L
L
H
H
H
X
L
L
L
H
L
H
L
L
L
X
X
H
L
H
H
L(2)
H
Output voltage > VOL
Output current < IOL
H
L
L
H(3)
L
H
H
(1) If the VSD is high, the STATUS pin is in a high impedance.
(2) The STATUS pin is low with a delay equal to tDSTKON after INPUT falling edge.
(3) The STATUS pin becomes high with a delay equal to tPOL after INPUT falling edge.
Figure 6. Switching characteristics
V
OUT
tWon
80%
tWoff
90%
dV
/dt
dV
/dt
OUT (off)
OUT (on)
10%
t
t
f
r
t
INPUT
t
d(on)
t
d(off)
t
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