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UC3845AN 参数 Datasheet PDF下载

UC3845AN图片预览
型号: UC3845AN
PDF下载: 下载PDF文件 查看货源
内容描述: 高性能电流模式PWM控制器 [HIGH PERFORMANCE CURRENT MODE PWM CONTROLLER]
分类和应用: 稳压器开关式稳压器或控制器电源电路开关式控制器光电二极管
文件页数/大小: 16 页 / 172 K
品牌: STMICROELECTRONICS [ STMICROELECTRONICS ]
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UC284XA
UC384XA
HIGH PERFORMANCE CURRENT MODE PWM CONTROLLER
NOT FOR NEW DESIGN
1
FEATURES
TRIMMED OSCILLATOR DISCHARGE
CURRENT
CURRENT MODE OPERATION TO 500kHz
AUTOMATIC FEED FORWARD
COMPENSATION
LATCHING PWM FOR CYCLE-BY-CYCLE
CURRENT LIMITING
INTERNALLY TRIMMED REFERENCE WITH
UNDERVOLTAGE LOCKOUT
HIGH CURRENT TOTEM POLE OUTPUT
UNDERVOLTAGE LOCKOUT WITH
HYSTERESIS
LOW START-UP CURRENT (< 0.5mA)
DOUBLE PULSE SUPPRESSION
Figure 1. Package
DIP-8
SO-8
Table 1. Order Codes
Part Number
UC2842AD1; UC3842AD1;
UC2843AD1; UC3843AD1;
UC2844AD1; UC3844AD1;
UC2845AD1; UC3845AD1
UC2842AN; UC3842AN;
UC2843AN; UC3843AN;
UC2844AN; UC3844AN;
UC2845AN; UC3845AN
Package
SO-8
DIP-8
2
DESCRIPTION
The UC384xA family of control ICs provides the
necessary features to implement off-line or DC to
DC fixed frequency current mode control schemes
with a minimal external parts count. Internally im-
plemented circuits include a trimmed oscillator for
precise DUTY CYCLE CONTROL under voltage
lockout featuring start-up current less than 0.5mA,
a precision reference trimmed for accuracy at the
error amp input, logic to insure latched operation,
a PWM comparator which also provides current
limit control, and a totem pole output stage de-
signed to source or sink high peak current. The
output stage, suitable for driving N-Channel MOS-
FETs, is low in the off-state.
Differences between members of this family are
the under-voltage lockout thresholds and maxi-
mum duty cycle ranges. The UC3842A and
UC3844A have UVLO thresholds of 16V (on) and
10V (off), ideally suited off-line applications The
corresponding thresholds for the UC3843A and
UC3845A are 8.5 V and 7.9V. The UC3842A and
UC3843A can operate to duty cycles approaching
100%. A range of the zero to < 50 % is obtained by
the UC3844A and UC3845A by the addition of an
internal toggle flip flop which blanks the output off
every other clock cycle.
Figure 2. Block Diagram
(toggle flip flop used only in UC3844A and UC3845A)
Vi
7
34V
GROUND
5
UVLO
S/R
5V
REF
INTERNAL
BIAS
VREF GOOD
LOGIC
RT/CT
4
OSC
ERROR AMP.
2R
R
1V
T
8
VREF
5V 50mA
2.50V
6
OUTPUT
VFB
COMP
CURRENT
SENSE
2
1
3
+
-
S
R
CURRENT
SENSE
COMPARATOR
D95IN331
PWM
LATCH
May 2004
REV. 5
1/16