STV0681 Hardware Interfaces
STV0681
Figure 5: SDRAM Write Timing (16Mbit device, burst write)
t
t
CK
t
L
H
DCLK
CKE
t
t
CMS
CMH
WRITE
Command
A0-9,BA
ACTIVE
ROW
NOP
PRECHARGE
NOP
COLUMN
A10
ROW
t
t
t
AS
AH
CMS
t
CMH
t
t
DH
DS
DQM
DQ
DIN M
DIN M + 1
DIN M + 2
DIN M + 3
t
RCD
t
RC
t
t
RP
RAS
Table 3: Timing parameters for SDRAM read/write
Symbol
Min.
Max
Units
Symbol
Min.
Max
Units
t
t
t
t
t
t
t
t
166.45
166.89
ns
t
81.01
ns
ns
CK
DS
DH
½
½
t
t
t
t
83.41
CH
CK
CK
CK
t
1
t
CL
RCD
CK
CK
CK
CK
CK
½
t
5
5
t
t
t
t
AC
RAS
0
ns
ns
ns
ns
t
7
2
OH
CMS
CMH
AS
RC
82.88
82.85
82.88
t
RP
t
1
RCD
t
82.76
ns
AH
4.2.3 SDRAM refresh period
The SDRAM refresh period from STV0681 is guaranteed to be inferior or equal to 15.6µs during
‘Snapshot’/self-timer/continuous/tethered video modes of operation (that is not standby mode). In
standby mode, the SDRAM is set to self-refresh, therefore no refresh from STV0681 takes place.
4.2.4 SDRAM initialisation period
The SDRAM initialisation period is currently set to 981µs in STV0681.
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STMICROELECTRONICS [ ST ]
