N-CHANNEL 75V - 0.009
Ω
- 75A D
2
PAK/I
2
PAK/TO-220
STripFET™ II POWER MOSFET
TYPE
STB75NF75L/-1
STP75NF75L
s
s
s
s
STP75NF75L
STB75NF75L STB75NF75L-1
V
DSS
75 V
75 V
R
DS(on)
<0.011
Ω
<0.011
Ω
I
D
75 A
75 A
3
1
TYPICAL R
DS
(on) = 0.009Ω
EXCEPTIONAL dv/dt CAPABILITY
100% AVALANCHE TESTED
LOW THRESHOLD DRIVE
3
12
D
2
PAK
TO-263
I
2
PAK
TO-262
DESCRIPTION
This MOSFET series realized with STMicroelectronics
unique STripFET process has specifically been designed
to minimize input capacitance and gate charge. It is
therefore suitable as primary switch in advanced high-
efficiency, high-frequency isolated DC-DC converters for
Telecom and Computer applications. It is also intended
for any applications with low gate drive requirements
.
3
1
2
TO-220
INTERNAL SCHEMATIC DIAGRAM
APPLICATIONS
s
SOLENOID AND RELAY DRIVERS
s
DC MOTOR CONTROL
s
DC-DC CONVERTERS
s
AUTOMOTIVE ENVIRONMENT
ABSOLUTE MAXIMUM RATINGS
Symbol
V
DS
V
DGR
V
GS
I
D
(•)
I
D
I
DM
(••)
P
tot
dv/dt
(1)
E
AS (2)
T
stg
T
j
Parameter
Drain-source Voltage (V
GS
= 0)
Drain-gate Voltage (R
GS
= 20 kΩ)
Gate- source Voltage
Drain Current (continuous) at T
C
= 25°C
Drain Current (continuous) at T
C
= 100°C
Drain Current (pulsed)
Total Dissipation at T
C
= 25°C
Derating Factor
Peak Diode Recovery voltage slope
Single Pulse Avalanche Energy
Storage Temperature
Max. Operating Junction Temperature
Value
75
75
± 15
75
70
300
300
2
20
680
-55 to 175
Unit
V
V
V
A
A
A
W
W/°C
V/ns
mJ
°C
(•) Current limited by package
(••)
Pulse width limited by safe operating area.
April 2002
.
(1) I
SD
≤
75A, di/dt
≤
500A/µs, V
DD
≤
V
(BR)DSS
, T
j
≤
T
JMAX.
(2) Starting T
j
= 25
o
C, I
D
= 37.5A, V
DD
= 30V
1/11