Memory and register map
STM8S207xx, STM8S208xx
Table 7 lists the boundary addresses for each memory size. The top of the stack is at the
RAM end address in each case.
Table 7.
Flash, Data EEPROM and RAM boundary addresses
Memory area
Size (bytes)
Start address
End address
128 K
64 K
32 K
0x00 8000
0x00 8000
0x00 8000
0x02 7FFF
0x01 7FFF
0x00 FFFF
Flash program memory
6 K
4 K
0x00 0000
0x00 0000
0x00 0000
0x00 4000
0x00 4000
0x00 4000
0x00 17FF
0x00 1000
0x00 07FF
0x00 47FF
0x00 45FF
0x00 43FF
RAM
2 K
2048
1536
1024
Data EEPROM
6.2
Register map
Table 8.
Address
I/O port hardware register map
Reset
status
Block
Register label
Register name
0x00 5000
0x00 5001
0x00 5002
0x00 5003
0x00 5004
0x00 5005
0x00 5006
0x00 5007
0x00 5008
0x00 5009
0x00 500A
0x00 500B
0x00 500C
0x00 500D
0x00 500E
PA_ODR
PA_IDR
Port A data output latch register
Port A input pin value register
Port A data direction register
Port A control register 1
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
Port A
PA_DDR
PA_CR1
PA_CR2
PB_ODR
PB_IDR
PB_DDR
PB_CR1
PB_CR2
PC_ODR
PB_IDR
PC_DDR
PC_CR1
PC_CR2
Port A control register 2
Port B data output latch register
Port B input pin value register
Port B data direction register
Port B control register 1
Port B
Port B control register 2
Port C data output latch register
Port C input pin value register
Port C data direction register
Port C control register 1
Port C
Port C control register 2
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Doc ID 14733 Rev 9
STMICROELECTRONICS [ ST ]
