STM8S903K3 STM8S903F3
Ordering information
IWDG_HW
[ ] 0: IWDG activated by software
[ ] 1: IWDG activated by hardware
(check only one option)
LSI_EN
[ ] 0: LSI clock is not available as CPU clock source
[ ] 1: LSI clock is available as CPU clock source
(check only one option)
HSITRIM
[ ] 0: 3-bit trimming supported in CLK_HSITRIMR register
[ ] 1: 4-bit trimming supported in CLK_HSITRIMR register
(check only one option)
OPT4 wakeup
PRSC
[ ] for 16 MHz to 128 kHz prescaler
[ ] for 8 MHz to 128 kHz prescaler
[ ] for 4 MHz to 128 kHz prescaler
(check only one option)
CKAWUSEL
[ ] LSI clock source selected for AWU
(check only one option)
[ ] HSE clock with prescaler selected as clock source for for
AWU
EXTCLK
[ ] External crystal connected to OSCIN/OSCOUT
[ ] External clock signal on OSCIN
(check only one option)
OPT5 crystal oscillator stabilization HSECNT (check only one option)
[ ] 2048 HSE cycles
[ ] 128 HSE cycles
[ ] 8 HSE cycles
[ ] 0.5 HSE cycles
OPT6 is reserved
Comments:
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Supply operating range in ...........................................................................................................
the application:
Notes:
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DocID15590 Rev 8
109/116
STMICROELECTRONICS [ ST ]
