STM8S003F3 STM8S003K3
Electrical characteristics
Total current consumption and timing in forced reset state
Table 30. Total current consumption and timing in forced reset state
Symbol
IDD(R)
Parameter
Conditions
VDD = 5 V
VDD = 3.3 V
Typ
Max(1)
Unit
400
300
-
-
Supply current in reset state (2)
µA
Reset release to bootloader vector
fetch
tRESETBL
-
-
150
µs
1. Data guaranteed by design, not tested in production.
2. Characterized with all I/Os tied to VSS
.
Current consumption of on-chip peripherals
Subject to general operating conditions for V and T .
DD
A
HSI internal RC/f
= f
= 16 MHz.
MASTER
CPU
Table 31. Peripheral current consumption
Parameter
Symbol
Typ.
Unit
IDD(TIM1)
IDD(TIM2)
IDD(TIM4)
IDD(UART1)
IDD(SPI)
TIM1 supply current (1)
210
130
50
TIM2 supply current (1)
TIM4 timer supply current (1)
UART1 supply current (2)
SPI supply current (2)
120
45
µA
IDD(I2C)
I2C supply current (2)
65
IDD(ADC1)
ADC1 supply current when converting (3)
1000
1. Data based on a differential IDD measurement between reset configuration and timer counter running at
16 MHz. No IC/OC programmed (no I/O pads toggling). Not tested in production.
2. Data based on a differential IDD measurement between the on-chip peripheral when kept under reset and
not clocked and the on-chip peripheral when clocked and not kept under reset. No I/O pads toggling. Not
tested in production.
3. Data based on a differential IDD measurement between reset configuration and continuous A/D
conversions. Not tested in production.
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