STM8S003K3 STM8S003F3
Electrical characteristics
(3) Measured from interrupt event to interrupt vector fetch.
(4) Configured by the REGAH bit in the CLK_ICKR register.
(5) Configured by the AHALT bit in the FLASH_CR1 register.
(6) Plus 1 LSI clock depending on synchronization.
9.3.2.6
Total current consumption and timing in forced reset state
Table 29: Total current consumption and timing in forced reset state
Symbol
Parameter
Conditions
Typ
Unit
Max(1)
IDD(R)
Supply current in reset
state(2)
VDD = 5 V
400
300
μA
VDD = 3.3 V
tRESETBL
Reset pin release to
vector fetch
150
μs
(1) Data guaranteed by design, not tested in production.
(2) Characterized with all I/Os tied to VSS
.
9.3.2.7
Current consumption of on-chip peripherals
Subject to general operating conditions for VDD and TA.
HSI internal RC/fCPU = fMASTER = 16 MHz, VDD = 5 V
Table 30: Peripheral current consumption
Symbol
Parameter
Typ.
Unit
IDD(TIM1)
210
130
50
TIM1 supply current(1)
IDD(TIM2)
IDD(TIM4)
IDD(UART1)
IDD(SPI)
TIM2 supply current(1)
TIM4 timer supply current(1)
UART1 supply current(2)
SPI supply current(2)
120
45
μA
2
IDD(I C)
65
I2C supply current(2)
IDD(ADC1)
1000
ADC1 supply current when converting(3)
DocID018576 Rev 2
57/99
STMICROELECTRONICS [ ST ]
