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STM32F103R4T7TR 参数 Datasheet PDF下载

STM32F103R4T7TR图片预览
型号: STM32F103R4T7TR
PDF下载: 下载PDF文件 查看货源
内容描述: 基于ARM的低密度高性能线的32位MCU,具有16或32 KB闪存, USB , CAN ,6个定时器, 2的ADC ,6个通信接口 [Low-density performance line, ARM-based 32-bit MCU with 16 or 32 KB Flash, USB, CAN, 6 timers, 2 ADCs, 6 communication interfaces]
分类和应用: 闪存微控制器和处理器外围集成电路通信时钟
文件页数/大小: 80 页 / 1067 K
品牌: STMICROELECTRONICS [ ST ]
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Electrical characteristics  
STM32F103x4, STM32F103x6  
Table 30. EMS characteristics  
Level/  
Symbol  
Parameter  
Conditions  
Class  
VDD 3.3 V, TA +25 °C,  
fHCLK 72 MHz  
conforms to IEC 61000-4-2  
Voltage limits to be applied on any I/O pin to  
induce a functional disturbance  
VFESD  
2B  
4A  
Fast transient voltage burst limits to be  
applied through 100 pF on VDD and VSS  
pins to induce a functional disturbance  
VDD3.3 V, TA +25 °C,  
fHCLK 72 MHz  
conforms to IEC 61000-4-4  
VEFTB  
Designing hardened software to avoid noise problems  
EMC characterization and optimization are performed at component level with a typical  
application environment and simplified MCU software. It should be noted that good EMC  
performance is highly dependent on the user application and the software in particular.  
Therefore it is recommended that the user applies EMC software optimization and  
prequalification tests in relation with the EMC level requested for his application.  
Software recommendations  
The software flowchart must include the management of runaway conditions such as:  
Corrupted program counter  
Unexpected reset  
Critical Data corruption (control registers...)  
Prequalification trials  
Most of the common failures (unexpected reset and program counter corruption) can be  
reproduced by manually forcing a low state on the NRST pin or the Oscillator pins for 1  
second.  
To complete these trials, ESD stress can be applied directly on the device, over the range of  
specification values. When unexpected behavior is detected, the software can be hardened  
to prevent unrecoverable errors occurring (see application note AN1015).  
Electromagnetic Interference (EMI)  
The electromagnetic field emitted by the device are monitored while a simple application is  
executed (toggling 2 LEDs through the I/O ports). This emission test is compliant with  
IEC 61967-2 standard which specifies the test board and the pin loading.  
Table 31. EMI characteristics  
Max vs. [fHSE/fHCLK  
]
Monitored  
Symbol Parameter  
Conditions  
Unit  
frequency band  
8/48 MHz 8/72 MHz  
0.1 to 30 MHz  
30 to 130 MHz  
130 MHz to 1GHz  
SAE EMI Level  
12  
22  
23  
4
12  
19  
29  
4
dBµV  
-
SEMI  
Peak level VDD 3.3 V, TA 25 °C  
50/80  
Doc ID 15060 Rev 3