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STM32F103R4T6XXX 参数 Datasheet PDF下载

STM32F103R4T6XXX图片预览
型号: STM32F103R4T6XXX
PDF下载: 下载PDF文件 查看货源
内容描述: 基于ARM的低密度高性能线的32位MCU,具有16或32 KB闪存, USB , CAN ,6个定时器, 2的ADC ,6个通信接口 [Low-density performance line, ARM-based 32-bit MCU with 16 or 32 KB Flash, USB, CAN, 6 timers, 2 ADCs, 6 communication interfaces]
分类和应用: 闪存通信
文件页数/大小: 80 页 / 1067 K
品牌: STMICROELECTRONICS [ STMICROELECTRONICS ]
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STM32F103x4, STM32F103x6
Electrical characteristics
Output driving current
The GPIOs (general purpose input/outputs) can sink or source up to +/-8 mA, and sink
+20 mA (with a relaxed V
OL
).
In the user application, the number of I/O pins which can drive current must be limited to
respect the absolute maximum rating specified in
Section 5.2:
The sum of the currents sourced by all the I/Os on V
DD,
plus the maximum Run
consumption of the MCU sourced on V
DD,
cannot exceed the absolute maximum rating
I
VDD
(see
Table 7).
The sum of the currents sunk by all the I/Os on V
SS
plus the maximum Run
consumption of the MCU sunk on V
SS
cannot exceed the absolute maximum rating
I
VSS
(see
Table 7).
Output voltage levels
Unless otherwise specified, the parameters given in
Table 35
are derived from tests
performed under ambient temperature and V
DD
supply voltage conditions summarized in
Table 9.
All I/Os are CMOS and TTL compliant.
Table 35.
Symbol
V
OL(1)
V
OH(2)
V
OL (1)
V
OH (2)
V
OL(1)(3)
V
OH(2)(3)
V
OL(1)(3)
V
OH(2)(3)
Output voltage characteristics
Parameter
Output low level voltage for an I/O pin
when 8 pins are sunk at same time
Output high level voltage for an I/O pin
when 8 pins are sourced at same time
Output low level voltage for an I/O pin
when 8 pins are sunk at same time
Output high level voltage for an I/O pin
when 8 pins are sourced at same time
Output low level voltage for an I/O pin
when 8 pins are sunk at same time
Output high level voltage for an I/O pin
when 8 pins are sourced at same time
Output low level voltage for an I/O pin
when 8 pins are sunk at same time
Output high level voltage for an I/O pin
when 8 pins are sourced at same time
Conditions
TTL port
I
IO
= +8 mA
2.7 V < V
DD
< 3.6 V
CMOS port
I
IO
=+ 8mA
2.7 V < V
DD
< 3.6 V
Min
Max
0.4
V
V
DD
–0.4
0.4
V
2.4
1.3
V
V
DD
–1.3
0.4
V
V
DD
–0.4
Unit
I
IO
= +20 mA
2.7 V < V
DD
< 3.6 V
I
IO
= +6 mA
2 V < V
DD
< 2.7 V
1. The I
IO
current sunk by the device must always respect the absolute maximum rating specified in
Table 7
and the sum of I
IO
(I/O ports and control pins) must not exceed I
VSS
.
2. The I
IO
current sourced by the device must always respect the absolute maximum rating specified in
IO
(I/O ports and control pins) must not exceed I
VDD
.
3. Based on characterization data, not tested in production.
Doc ID 15060 Rev 3
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