STM32F103x4, STM32F103x6
Table 20.
Symbol
f
HSE_ext
V
HSEH
V
HSEL
t
w(HSE)
t
w(HSE)
t
r(HSE)
t
f(HSE)
C
in(HSE)
Electrical characteristics
High-speed external user clock characteristics
Parameter
User external clock source
frequency
(1)
OSC_IN input pin high level voltage
OSC_IN input pin low level voltage
OSC_IN high or low time
(1)
OSC_IN rise or fall
time
(1)
5
45
V
SS
V
IN
V
DD
55
±1
Conditions
Min
1
0.7V
DD
V
SS
16
ns
20
pF
%
µA
Typ
8
Max
25
V
DD
0.3V
DD
Unit
MHz
V
OSC_IN input capacitance
(1)
DuCy
(HSE)
Duty cycle
I
L
OSC_IN Input leakage current
1. Guaranteed by design, not tested in production.
Low-speed external user clock generated from an external source
The characteristics given in
Table 21
result from tests performed using an low-speed
external clock source, and under ambient temperature and supply voltage conditions
summarized in
Table 9.
Table 21.
Symbol
f
LSE_ext
V
LSEH
V
LSEL
t
w(LSE)
t
w(LSE)
t
r(LSE)
t
f(LSE)
C
in(LSE)
Low-speed external user clock characteristics
Parameter
User External clock source
frequency
(1)
OSC32_IN input pin high level
voltage
OSC32_IN input pin low level
voltage
OSC32_IN high or low time
(1)
OSC32_IN rise or fall time
(1)
OSC32_IN input capacitance
(1)
30
V
SS
V
IN
V
DD
5
70
±1
0.7V
DD
V
SS
450
ns
50
pF
%
µA
Conditions
Min
Typ
32.768
Max
1000
V
DD
V
0.3V
DD
Unit
kHz
DuCy
(LSE)
Duty cycle
I
L
OSC32_IN Input leakage
current
1. Guaranteed by design, not tested in production.
Doc ID 15060 Rev 3
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