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STM32F103RCH6TR 参数 Datasheet PDF下载

STM32F103RCH6TR图片预览
型号: STM32F103RCH6TR
PDF下载: 下载PDF文件 查看货源
内容描述: 高密度高性能线的基于ARM的32位MCU,具有256至512KB闪存, USB , CAN ,11个定时器, 3的ADC ,13个通信接口 [High-density performance line ARM-based 32-bit MCU with 256 to 512KB Flash, USB, CAN, 11 timers, 3 ADCs, 13 communication interfaces]
分类和应用: 闪存通信
文件页数/大小: 123 页 / 1691 K
品牌: STMICROELECTRONICS [ ST ]
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STM32F103xC, STM32F103xD, STM32F103xE  
Electrical characteristics  
(1)(2)  
Table 35. Synchronous multiplexed NOR/PSRAM read timings  
Symbol Parameter  
tw(CLK)  
Min  
27.7  
Max  
Unit  
FSMC_CLK period  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
td(CLKL-NExL)  
td(CLKH-NExH)  
td(CLKL-NADVL)  
td(CLKL-NADVH)  
td(CLKL-AV)  
FSMC_CLK low to FSMC_NEx low (x = 0...2)  
FSMC_CLK high to FSMC_NEx high (x = 0...2)  
FSMC_CLK low to FSMC_NADV low  
1.5  
THCLK + 2  
4
0
FSMC_CLK low to FSMC_NADV high  
5
FSMC_CLK low to FSMC_Ax valid (x = 16...25)  
td(CLKH-AIV)  
FSMC_CLK high to FSMC_Ax invalid (x = 16...25) THCLK + 2  
FSMC_CLK low to FSMC_NOE low  
td(CLKL-NOEL)  
td(CLKH-NOEH)  
td(CLKL-ADV)  
td(CLKL-ADIV)  
THCLK +1 ns  
ns  
FSMC_CLK high to FSMC_NOE high  
FSMC_CLK low to FSMC_AD[15:0] valid  
FSMC_CLK low to FSMC_AD[15:0] invalid  
THCLK + 0.5  
12  
ns  
ns  
0
6
FSMC_A/D[15:0] valid data before FSMC_CLK  
high  
tsu(ADV-CLKH)  
th(CLKH-ADV)  
ns  
FSMC_A/D[15:0] valid data after FSMC_CLK high THCLK – 10  
ns  
ns  
ns  
tsu(NWAITV-CLKH) FSMC_NWAIT valid before FSMC_CLK high  
th(CLKH-NWAITV) FSMC_NWAIT valid after FSMC_CLK high  
8
2
1. CL = 15 pF.  
2. Based on characterization, not tested in production.  
Doc ID 14611 Rev 7  
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